AD9957 datasheet(21/38 Pages) AD

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PRELIMINARY TECHNICAL DATA

AD9957

Rev. PrF | Page 21 of 38

SERIAL PROGRAMMING

CONTROL INTERFACE—SERIAL I/O

The AD9957 serial port is a flexible, synchronous serial communi-

cations port allowing easy interface to many industry standard

microcontrollers and microprocessors. The serial I/O is compatible

with most synchronous transfer formats, including both the Mo-

torola 6905/11 SPI and Intel 8051 SSR protocols.

The interface allows read/write access to all registers that configure

the AD9957. MSB first or LSB first transfer formats are supported.

In addition, the AD9957’s serial interface port can be configured as

a single pin I/O (SDIO), which allows a two-wire interface or two

unidirectional pins for in/out (SDIO/SDO), which enables a three

wire interface. Two optional pins (IORESET and CSB) enable

greater flexibility for system design-in of the AD9957.

With the AD9957, the Instruction Byte specifies read/write opera-

tion and register address. Serial operations on the AD9957 occur

only at the register level, not the byte level due to the lack of byte

address space in the Instruction Byte.

For the AD9957, the serial port controller recognizes the register

address in the Instruction Byte and expects that all bytes of that

out of sequence for the next write routine. However, one way to

write less bytes than required is to use the IORESET feature. The

IORESET function can be used to abort an IO operation and reset

the pointer in the serial port controller. After an IORESET, the next

byte will be the instruction byte. Every byte that is written prior to

the IORESET is preserved. Partial bytes are not preserved.

GENERAL OPERATION OF THE SERIAL INTERFACE

There are two phases to a communication cycle with the AD9957.

Phase 1 is the instruction cycle, which is the writing of an instruc-

tion byte into the AD9957, coincident with the first eight SCLK

rising edges. The instruction byte provides the AD9957 serial port

controller with information regarding the data transfer cycle, which

is Phase 2 of the communication cycle. The Phase 1 instruction

byte defines whether the upcoming data transfer is read or write

and the serial address of the register being accessed

The first eight SCLK rising edges of each communication cycle are

used to write the instruction byte into the AD9957. The remaining

SCLK edges are for Phase 2 of the communication cycle. Phase 2 is

the actual data transfer between the AD9957 and the system con-

troller. The number of bytes transferred during Phase 2 of the

communication cycle is a function of the register being accessed.

For example, when accessing the Control Function Register #2,

which is four bytes wide, Phase 2 requires that four bytes be trans-

ferred. If accessing the Amplitude Scale Factor Register, which is

two bytes wide, Phase 2 requires that two bytes be transferred. After

transferring all data bytes per the instruction, the communication

cycle is completed.

At the completion of any communication cycle, the AD9957 serial

port controller expects the next 8 rising SCLK edges to be the in-

struction byte of the next communication cycle.

All data input to the AD9957 is registered on the rising edge of

SCLK. All data is driven out of the AD9957 on the falling edge of

SCLK.

The Figures below are useful in understanding the general opera-

tion of the AD9957 Serial Port.

SDIO

INSTRUCTION CYCLE

DATA TRANSFER CYCLE

SCLK

Serial Port Writing Timing—Clock Stall Low

DO7

INSTRUCTION CYCLE

DATA TRANSFER CYCLE

DON'T CARE

SDIO

SCLK

SDO

DO6

DO5

DO4

DO3

DO2

DO1

DO0

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