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DP83849C датащи(PDF) 39 Page - National Semiconductor (TI) |
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DP83849C датащи(HTML) 39 Page - National Semiconductor (TI) |
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39 / 96 page ![]() 39 www.national.com 5.7.1.5 Cable Signal Quality Estimation The cable signal quality estimator keeps a simple tracking of results of the DSP and can be used to generate an approximate Signal-to-Noise Ratio for the 100Mb receiver. This information is available to software through the Link Diagnostics Registers - Page 2: Variance Control (VAR_CTRL), address 1Ah and Data (VAR_DATA), address 1Bh. The variance computation times (VAR_TIMER) can be chosen from the set of {2, 4, 6, 8} ms. The 32-bit variance sum can be read by two consecutive reads of the VAR_DATA register. This sum can be used to compute an SNR estimate by software using the following equation: SNR = 10log10((37748736 * VAR_TIMER) / Variance). 5.7.2 Link Quality Monitor The Link Quality Monitor allows a method to generate an alarm when the DSP adaption strays from a programmable window. This could occur due to changes in the cable which could indicate a potential problem. Software can program thresholds for the following DSP parameters to be used to interrupt the system: — Digital Equalizer C1 Coefficient (DEQ C1) — Digital Adaptive Gain Control (DAGC) — Digital Base-Line Wander Control (DBLW) — Recovered Clock Long-Term Frequency Offset (FREQ) — Recovered Clock Frequency Control (FC) Software is expected to read initial adapted values and then program the thresholds based on an expected valid range. This mechanism takes advantage of the fact that the DSP adaption should remain in a relatively small range once a valid link has been established. 5.7.2.1 Link Quality Monitor Control and Status Control of the Link Quality Monitor is done through the Link Quality Monitor Register (LQMR), address 1Dh and the Link Quality Data Register (LQDR), address 1Bh of the Link Diagnostics Registers - Page 2. The LQMR register includes a global enable to enable the Link Quality Monitor function. In addition, it provides warning status from both high and low thresholds for each of the monitored parame- ters. Note that individual low or high parameter threshold comparisons can be disabled by setting to the minimum or maximum values. To allow the Link Quality Monitor to interrupt the system, the Interrupt must be enabled through the interrupt control registers, MICR (11h) and MISR (12h). 5.7.2.2 Checking Current Parameter Values Prior to setting Threshold values, it is recommended that software check current adapted values. The thresholds may then be set relative to the adapted values. The current adapted values can be read using the LQDR register by setting the Sample_Param bit [13] of LQDR, address (1Eh). For example, to read the DBLW current value: 1. Write 2400h to LQDR (1Eh) to set the Sample_Param bit and set the LQ_PARAM_SEL[2:0] to 010. 2. Read LQDR (1Eh). Current DBLW value is returned in the low 8 bits. 5.7.2.3 Threshold Control The LQDR (1Eh) register also provides a method of pro- gramming high and low thresholds for each of the four parameters that can be monitored. The register imple- ments an indirect read/write mechanism. Writes are accomplished by writing data, address, and a write strobe to the register. Reads are accomplished by writing the address to the register, and reading back the value of the selected threshold. Setting thresholds to the maximum or minimum values will disable the threshold comparison since values have to exceed the threshold to generate a warning condition. Warnings are not generated if the parameter is equal to the threshold. By default, all thresholds are disabled by setting to the min or max values. The following table shows the four parameters and range of values: Table 17. Link Quality Monitor Parameter Ranges Parameter Minimum Value Maximum Value Min (2-s comp) Max (2-s comp) DEQ C1 -128 +127 0x80 0x7F DAGC 0 +255 0x00 0xFF DBLW -128 +127 0x80 0x7F Freq Offset -128 +127 0x80 0x7F Freq Control -128 +127 0x80 0x7F |
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