AD7763 datasheet(14/32 Pages) AD

14 / 32 page

AD7763

Rev. 0 | Page 14 of 32

THEORY OF OPERATION

The AD7763 employs a Σ-Δ conversion technique to convert

the analog input into an equivalent digital word. The modulator

samples the input waveform and outputs an equivalent digital

word to the digital filter at a rate equal to ICLK.

Due to the high oversampling rate, which spreads the quanti-

zation noise from 0 to f

ICLK, the noise energy contained in the

band of interest is reduced (see Figure 23). To further reduce

quantization noise, a high order modulator is employed to shape

the noise spectrum; thus, most of the noise energy is shifted out

of the band of interest (see Figure 24).

The digital filtering that follows the modulator removes the

large out-of-band quantization noise (see Figure 25), while

also reducing the data rate from f

ICLK at the input of the filter

to f

ICLK/32 or less at the output of the filter, depending on the

decimation rate used.

Digital filtering has certain advantages over analog filtering.

It does not introduce significant noise or distortion and can

be made perfectly linear phase.

The AD7763 employs three finite impulse response (FIR) filters

in series. By using different combinations of decimation ratios

and filter selection, data can be obtained from the AD7763 at

four different data rates. The first filter receives data from the

modulator at ICLK

MHz, where it is decimated × 4 to output

data at (ICLK/4)

MHz.

The second filter allows the decimation rate to be chosen from

8× to 32×. The third filter has a fixed decimation rate of 2x, is

user programmable, and has a default configuration (see the

Programmable FIR Filter section). This filter can be bypassed.

Table 6 shows some characteristics of the default filter. The group

delay of the filter is defined as the delay to the center of the

impulse response and is equal to the computation plus filter

delays. The delay until valid data is available (the DVALID status bit

is set) is equal to 2× the filter delay plus the computation delay.

QUANTIZATION NOISE

fICLK/2

BAND OF INTEREST

Figure 23. Σ-Δ ADC, Quantization Noise

fICLK/2

NOISE SHAPING

BAND OF INTEREST

Figure 24. Σ-Δ ADC, Noise Shaping

fICLK/2

BAND OF INTEREST

DIGITAL FILTER CUTOFF FREQUENCY

Figure 25. Σ-Δ ADC, Digital Filter Cutoff Frequency

Table 6. Configuration With Default Filter

ICLK

Frequency

Filter

Filter 3

Data State

Computation

Delay

Filter

Delay

Pass Band

Bandwidth

Output Data Rate

(ODR)

20 MHz

4×

2×

Fully filtered

1.775 μs

44.4 μs

250 kHz

625 kHz

20 MHz

4×

8×

Bypassed

Partially

filtered

2.6 μs

10.8 μs

140.625 kHz

625 kHz

20 MHz

4×

8×

2×

Fully filtered

2.25 μs

87.6 μs

125 kHz

312.5 kHz

20 MHz

4×

16×

Bypassed

Partially

filtered

4.175 μs

20.4 μs

70.3125 kHz

312.5 kHz

20 MHz

4×

16×

2×

Fully filtered

3.1 μs

174 μs

62.5 kHz

156.25 kHz

20 MHz

4×

32×

Bypassed

Partially

filtered

7.325 μs

39.6 μs

35.156 kHz

156.25 kHz

20 MHz

4×

32×

2×

Fully filtered

4.65 μs

346.8 μs

31.25 kHz

78.125 kHz

12.288 MHz

4×

8×

2×

Fully filtered

3.66 μs

142.6 μs

76.8 kHz

192 kHz

12.288 MHz

4×

16×

2×

Fully filtered

5.05 μs

283.2 μs

38.4 kHz

96 kHz

12.288 MHz

4×

32×

Bypassed

Partially

filtered

11.92 μs

64.45 μs

21.6 kHz

96 kHz

12.288 MHz

4×

32×

2×

Fully filtered

7.57 μs

564.5 μs

19.2 kHz

48 kHz

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