ISL8200AMMREP datasheet(16/24 Pages) RENESAS

16 / 24 page

ISL8200AMM

FN8287 Rev 2.00

Page 16 of 24

June 3, 2015

Power-Good

The Power-Good comparator monitors the voltage on the internal

VMON1 pin. The trip points are shown in Figure 29. PGOOD will

not be asserted until after the completion of the soft-start cycle.

PGOOD pulls low upon both EN disabling it or the voltage of the

internal VMON1 pin going out of the threshold window. PGOOD

will not pull low until the fault is present for three consecutive

clock cycles.

The UV indication is not enabled until the end of soft-start. In a UV

event, if the output drops below -13% of the target level due to

some reason (cases when EN is not pulled low) other than OV,

OC, OT, and PLL faults, PGOOD will be pulled low.

Current Share

The IAVG_CS is the current of the module. ISHARE and ISET pins

source a copy of IAVG_CS with 15µA offset, i.e., the full scale will

be 126µA.

The share bus voltage (VISHARE) set by an external resistor

(RISHARE = RISET/NCTRL) represents the average current of all

active modules. The voltage (VISET) set by RISET represents the

average current of the corresponding module and is compared

with the share bus (VISHARE). The current share error signal

(ICSH_ER) is then fed into the current correction block to adjust

each module’s PWM pulse accordingly. The current share

function provides at least 10% overall accuracy between ICs, up

to 3 phases. The current share bus works for up to 6-phase.

Figure 4 further illustrates the current sharing aspects of the

ISL8200AMMREP.

When there is only one module in the system, the ISET and

ISHARE pins can be shorted together and grounded via a single

resistor to ensure zero share error - a resistor value of 5k

(paralleling 10k on ISET and ISHARE) will allow operation up to

the OCP level.

Overvoltage Protection (OVP)

The Overvoltage (OV) protection indication circuitry monitors the

voltage on the internal VMON1 pin.

OV protection is active from the beginning of soft-start. An OV

condition (>120%) would latch the IC off (the high-side MOSFET

to latch off permanently; the low-side MOSFET turns on

immediately at the time of OV trip and then turns off

permanently after the output voltage drops below 87%). EN and

PGOOD are also latched low at an OV event. The latch condition

can be reset only by recycling VCC.

There is another non-latch OV protection (113% of target level).

At the condition of EN low and the output over 113% OV, the

lower side MOSFET will turn on until the output drops below 87%.

This is to protect the overall power trains in case of a single

channel of a multi-module system detecting OV. The low-side

MOSFET always turns on at the conditions of EN = LOW and the

output voltage above 113% (all EN pins are tied together) and

turns off after the output drops below 87%. Thus, in a high phase

count application (multi-module mode), all cascaded modules

can latch off simultaneously via the EN pins (EN pins are tied

together in multiphase mode), and each IC shares the same sink

current to reduce the stress and eliminate the bouncing among

phases.

Over-Temperature Protection (OTP)

When the junction temperature of the IC is greater than +150°C

(typically), EN pin will be pulled low to inform other cascaded

channels via their EN pins. All connected ENs stay low and

release after the IC’s junction temperature drops below +125°C

(typically), a +25°C hysteresis (typically).

Overcurrent Protection (OCP)

The OCP function is enabled at startup. The load current

sampling ICS1 is sensed by sampling the voltage across Q2

MOSFET rDS(ON) during turn on through the resistor between

OCSET and PHASE pin. IC1 is compared with the Channel

Overcurrent Limit ‘111µA OCP’ comparator, and waits 7-cycles

before OCP condition is declared. The module’s output current

(ICS1) plus a fixed internal 15µA offset forms a voltage (VISHARE)

across the external resistor, RISHARE. VISHARE is compared with a

precision internal 1.2V threshold for a second method to detect

OCP condition.

Multi-module operation can be achieved by connecting the

ISHARE pin of two or more modules together. In multi-module

operation the voltage on the ISHARE pin correlates to the

average current of all active channels This scheme helps protect

from damaging a module(s) in multi-module mode by not having

a single module carrying more than 111µA. Note that it is not

necessary for the RISHARE to be scaled to trip at the same level

as the 111µA OCP comparator. Typically the ISHARE pin average

current protection level should be higher than the phase current

protection level.

With an internal RISEN-IN of 2.2kΩ, the OCP level is set to the

default value. To lower the OCP level, an external RISEN-EX is

connected between OCSET and PHASE pin. The relationships

between the external RISEN-EX values and the typical output

current IOUT(MAX) OCP levels for ISL8200AMMREP are shown in

Figures 31 through 33. It is important to note that the OCP level

FIGURE 29. POWER-GOOD THRESHOLD WINDOW

-13%

-9%

VREF

+9%

+13%

VMON1

END OF SS1

AND

PGOOD

CHANNEL 1 UV/OV

+20%

PGOOD

PGOOD LATCH OFF

AFTER 120% OV

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