HC705E5GRSSLASHD datasheet(116/148 Pages) NXP

номер детали	HC705E5GRS/D

подробное описание детали	General Release Specification

PDF	148 Pages

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производитель	NXP [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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Instruction Set

General Release Specification

MC68HC705E5 — Rev. 1.0

Instruction Set

14.2 Introduction

The MCU instruction set has 62 instructions and uses eight addressing

modes. The instructions include all those of the M146805 CMOS Family

plus one more: the unsigned multiply (MUL) instruction. The MUL

instruction allows unsigned multiplication of the contents of the

accumulator (A) and the index register (X). The high-order product is

stored in the index register, and the low-order product is stored in the

accumulator.

14.3 Addressing Modes

The CPU uses eight addressing modes for flexibility in accessing data.

The addressing modes provide eight different ways for the CPU to find

the data required to execute an instruction. The eight addressing modes

are:

•

Inherent

•

Immediate

•

Direct

•

Extended

•

Indexed, no offset

•

Indexed, 8-bit offset

•

Indexed, 16-bit offset

•

Relative

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705E5GRS/D датащи(PDF) 116 Page - NXP Semiconductors