16

FN8170.3

August 29, 2006

D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)

ENDURANCE AND DATA RETENTION

CAPACITANCE

POWER-UP TIMING

POWER-UP AND DOWN REQUIREMENTS

The are no restrictions on the sequencing of the bias supplies VCC, V+, and V- provided that all three supplies reach

their final values within 1msec of each other. At all times, the voltages on the potentiometer pins must be less than V+

and more than V-. The recall of the wiper position from nonvolatile memory is not in effect until all supplies reach their

final value. The VCC ramp rate spec is always in effect.

A.C. TEST CONDITIONS

Notes: (6) This parameter is not 100% tested

(7) tPUR and tPUW are the delays required from the time the (last) power supply (VCC-) is stable until the specific instruction can be issued.

These parameters are not 100% tested.

Symbol

Parameter

Limits

Test Conditions

Min.

Typ.

Max.

Units

ICC1

VCC supply current

(active)

400

AfSCK = 2.5 MHz, SO = Open, VCC = 6V

Other Inputs = VSS

ICC2

VCC supply current

(nonvolatile write)

15

mA

fSCK = 2.5MHz, SO = Open, VCC = 6V

Other Inputs = VSS

ISB

VCC current (standby)

5

ASCK = SI = VSS, Addr. = VSS,

CS = VCC = 6V

ILI

Input leakage current

10

AVIN = VSS to VCC

ILO

Output leakage current

10

AV

OUT = VSS to VCC

VIH

Input HIGH voltage

VCC x 0.7

VCC + 1

V

VIL

Input LOW voltage

-1

VCC x 0.3

V

VOL

Output LOW voltage

0.4

V

IOL = 3mA

VOH

Output HIGH voltage

VCC - 0.8

V

IOH = -1mA, VCC +3V

VOH

Output HIGH voltage

VCC - 0.4

V

IOH = -0.4mA, VCC +3V

Parameter

Min.

Units

Minimum endurance

100,000

Data changes per bit per register

Data retention

100

years

Symbol

Test

Max.

Units

Test Conditions

COUT

(6)

Output capacitance (SO)

8

pF

VOUT = 0V

CIN

(6)

Input capacitance (A0, A1, SI, CS, WP, HOLD, and SCK)

6

pF

VIN = 0V

Symbol

Parameter

Min.

Max.

Units

tr VCC

(6)

VCC Power-up rate

0.2

50

V/ms

tPUR

(7)

Power-up to initiation of read operation

1

ms

Input Pulse Levels

VCC x 0.1 to VCC x 0.9

Input rise and fall times

10ns

Input and output timing level

VCC x 0.5

X9260