HC05RC17GRSSLASHD datasheet(97/128 Pages) NXP

номер детали	HC05RC17GRS/D

подробное описание детали	General Release Specification

PDF	128 Pages

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производитель	NXP [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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Instruction Set

Instruction Types

MC68HC05RC17 — Rev. 2.0

General Release Specification

Instruction Set

11.3.8 Relative

Relative addressing is only for branch instructions. If the branch

condition is true, the CPU finds the effective branch destination by

adding the signed byte following the opcode to the contents of the

program counter. If the branch condition is not true, the CPU goes to the

next instruction. The offset is a signed, two’s complement byte that gives

a branching range of –128 to +127 bytes from the address of the next

location after the branch instruction.

When using the Freescale assembler, the programmer does not need to

calculate the offset, because the assembler determines the proper offset

and verifies that it is within the span of the branch.

11.4 Instruction Types

The MCU instructions fall into the following five categories:

• Register/Memory Instructions

• Read-Modify-Write Instructions

• Jump/Branch Instructions

• Bit Manipulation Instructions

• Control Instructions

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC05RC17GRS/D датащи(PDF) 97 Page - NXP Semiconductors