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ICS844246DI датащи(PDF) 14 Page - Renesas Technology Corp

номер детали ICS844246DI
подробное описание детали  FemtoClock® Crystal-to-LVDS Frequency Synthesizer w/Integrated Fanout Buffer
PDF  21 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS844246DI датащи(HTML) 14 Page - Renesas Technology Corp

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ICS844246DI Data Sheet
FEMTOCLOCK® CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER w/FANOUT BUFFER
ICS844246DGI REVISION A NOVEMBER 28, 2012
14
©2012 Integrated Device Technology, Inc.
Figure 4. ICS844246DI Application Schematic
Place 0.1uF b ypass ca ps
direc tl y adja cent to
th e
corre sp onding VDD an d VDDA
pins.
VC C _Rec eiv er
Receiv e r
+
-
(Select R4 and R6 t o cent er the LVDS swing in the
common mode center of the Receiver.)
Zo = 50 O hm
Zo = 50 O hm
R2
50
R3
50
C10
0. 01uF
C12
0.1u
Q5
C13
0.1u
nQ 5
R4
R6
Alte rnat e AC cou pled LVD S Te rmin atio n
to n on-L VDS Rece iver .
Q0
nQ 1
Q1
nQ 2
Q2
Q3
nQ 3
nQ 4
Q4
LVDS Termination
VD D
C1
0.1uF
3. 3V
C2
10uF
FB1
BLM18BB221SN 1
1
2
R5
10
C3
10 uF
C4
0. 1uF
C5
0.1uF
U1
PLL_BYPASS
9
FB_ SEL
12
XTAL_IN
13
XTAL_OU T
14
N_SEL0
15
N_SEL1
18
nQ2
3
Q2
4
nQ1
5
Q1
6
nQ0
7
Q0
8
nQ5
19
Q5
20
nQ4
21
Q4
22
nQ3
23
Q3
24
VDD O
1
VDD O
2
C6
22pF
C7
22pF
X1
25MHz (18pf )
VD D
To Logic
Input
pins
VDD
RU 2
No t I ns tall
RU 1
1K
RD 2
1K
To Logic
Input
pins
RD 1
Not Ins t all
Set Logic
Input to '1'
Set Logic
Input to '0'
Logic Control Input Examples
VDD A
LVD S R ec eiv er
+
-
Zo = 50 O hm
Zo = 50 O hm
R1
100
nQ 0
C14
0.1uF
N_SEL1
N_SEL0
FB_SEL
PLL_BYPASS
3. 3V
C8
0.1uF
C9
10uF
FB2
BLM18BB221SN 1
1
2
Pl ac e 0.1uF bypass c a p dire ct ly
ad ja ce nt to the VDDO
pins.
C11
0.1uF



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