ICS843SDN

FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR

IDT™ / ICS™ 3.3V LVPECL CLOCK GENERATOR

7

ICS843SDNAG REV. A

NOVEMBER 13, 2012

Schematic Example

Figure 5A shows an example of the ICS843SDN application

schematic. In this example, the device is operated at VCC = 3.3V.

The 18pF parallel resonant crystal is used. The C1 = 27pF and C2

= 27pF are recommended for frequency accuracy. For a different

board layout, the C1 and C2 values may be slightly adjusted for

optimizing frequency accuracy. Two examples of LVPECL

terminations are shown in this schematic. Additional approaches

are shown in the LVPECL Termination Application Note.

Note: Thermal pad (E-pad) must be connected to ground (VEE).

Figure 5A. ICS843SDN Schematic Example

VCC

R8

50

Zo = 50 Ohm

VCC

R7

50

1 8 p F

R1

10

XTAL_OUT

R3

133

Zo = 50 Ohm

C5

0.01u

R5

82.5

Zo = 50 Ohm

Q

U1

1

2

3

4

8

7

6

5

VCCA

VEE

XTAL_OUT

XTAL_IN

VCC

Q

nQ

nc

XTAL_IN

X1

25MHz

nQ

+

-

R4

82.5

R6

50

C2

27pF

3.3V

C4

10uF

VCC=3.3V

Optional

Y-Termination

Zo = 50 Ohm

+

-

VCC

VCCA

C1

27pF

R2

133

C3

0.01u