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RC32012A датащи(PDF) 39 Page - Renesas Technology Corp

номер детали RC32012A
подробное описание детали  FemtoClock Jitter Attenuator and Clock Generator
PDF  66 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RC32012A датащи(HTML) 39 Page - Renesas Technology Corp

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R31DS0078EU0103 Rev.1.03
Page 39
Sep 15, 2022
RC32012A Datasheet
4.13.1 Write-Frequency Mode
For the DPLL channel in this mode a Frequency Control Word (FCW) is used to adjust the frequency output of the
DCO (by steering the FOD) and the phase detector and loop filter are essentially bypassed. All the filtering is done
by an external device and the frequency offset written into the Write Frequency Configuration register is passed
on directly to the output clocks. This is shown in Figure 12. When applied, the FCW will not cause any missing
pulses or glitches in the output clock, although a large frequency jump may cause issues with devices receiving
this clock. The output will remain at this frequency until a new FCW is written.
Figure 12. External DCO Control via Frequency Control Word
The FCW is a 42-bit 2’s-complement value. The FCW has a granularity of 1.11x10-10ppm and a full range of
+244.20ppm to -244.08 ppm of the nominal DCO frequency. A positive value will increase the output frequency
and a negative one will decrease the output frequency. The formula for calculation of the FCW from the fractional
frequency offset (FFO) is:
Where,
FFO = Fractional Frequency Offset, in ppm
FCW = Frequency Control Word (Positive or Negative Integer)
The value resulting from the above calculation must be converted to a 42-bit 2’s complement value and then sign-
extended to 48-bits to be written into the register.
Write frequency mode may be used to make phase changes on the output. For fine resolution, phase changes are
done by controlling the DCO’s frequency. Coarse phase adjustments should be done by snap-alignment method
by using the Phase Offset registers. Using the Phase Offset registers is referred to as the snap-alignment method
since the output will snap directly to that new phase rather than moving smoothly to it over time. The snap-
alignment method provides fast coarse phase alignments and therefore it should be used to bring the phase close
to the desired value and then use the DCO in write frequency mode to fine tune it. Since write frequency mode is
changing the frequency, the phase will move smoothly over time without any jumps.
4.13.2 Increment / Decrement Registers and Pins
The DCO frequency update can also be done by applying a preset frequency offset value to be added or to be
subtracted from a cumulative FCW value. The cumulative FCW value behaves as described in the previous
section.
Steerable
Fractional
Divider
Output Stage
With
Integer Divider(s)
Low-Noise
Analog PLL
Frequency
Control Word
From
System DPLL
+
Digital PLL
FCW
1
1
1 FFO
106
------------
+
----------------------------
–
253
=



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