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DSP56321RM/D датащи(PDF) 52 Page - NXP Semiconductors |
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DSP56321RM/D датащи(HTML) 52 Page - NXP Semiconductors |
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52 / 88 page ![]() 2-28 AC Electrical Characteristics 2.5.9 Timer Timing Table 2-13. Timer Timings No. Characteristics Expression 220 MHz 240 MHz Unit Min Max Min Max 480 TIO Low 2 × T C + 2.0 11.1 — 10.3 — ns 481 TIO High 2 × T C + 2.0 11.0 — 10.3 — ns 486 Synchronous delay time from Timer input rising edge to the external memory address out valid caused by the first interrupt instruction execution 10.25 × T C + 10.0 56.64 — 52.74 — ns Notes: 1. VCCQH = 3.3 V ± 0.3 V, VCCQL = 1.6 V ± 0.1 V; TJ = 0°C to +85°C, CL = 50 pF 2. The maximum frequency of pulses generated by a timer will be defined after device characterization is completed. 3. In the timing diagrams below, TIO is drawn using the rising edge as the reference. TIO polarity is programmable in the Timer Control/Status Register (TCSR). Refer to the DSP56321 Reference Manual for details. Figure 2-26. TIO Timer Event Input Restrictions Figure 2-27. Timer Interrupt Generation TIO 481 480 TIO (Input) First Interrupt Instruction Execution Address 486 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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