RA4E2 datasheet(50/90 Pages) RENESAS

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SSLn0

input

RSPCKn

CPOL = 0

input

RSPCKn

CPOL = 1

input

MISOn

output

MOSIn

input

tDr, tDf

tSA

tOH

tLEAD

tTD

tLAG

LSB OUT

(Last data)

DATA

MSB OUT

MSB IN

DATA

LSB IN

MSB IN

LSB OUT

tSU

tOD

tREL

MSB OUT

Note:

n = A or B

Figure 2.40

SPI timing for slave when CPHA = 1

2.3.10

I3C Timing

Table 2.28

IIC timing(1)-1

1. Conditions: Middle drive output is selected in the Port Drive Capability bit in the PmnPFS register for the following pins: SDA0_A,

SCL0_A, SDA0_B, SCL0_B, SDA0_C, SCL0_C.

2. The following pins do not require setting: SDA0_D, SCL0_D.

3. Use pins that have a letter appended to their names, for instance “_A” or “_B”, to indicate group membership. For the IIC interface, the

AC portion of the electrical characteristics is measured for each group.

Parameter

Symbol

Min

Max

Unit

IIC (Standard mode,

SMBus)

BFCTL.FMPE = 0

SCL input cycle time

tSCL

10(18) × tI3Ccyc + 1300

—

SCL input high pulse width

tSCLH

5(9) × tI3Ccyc + 300

—

SCL input low pulse width

tSCLL

5(9) × tI3Ccyc + 300

—

SCL, SDA rise time

tSr

—

1000

SCL, SDA fall time

tSf

—

300

SCL, SDA input spike pulse removal

time

tSP

1(4) × tI3Ccyc

SDA input bus free time when wakeup

function is disabled

tBUF

5(9) × tI3Ccyc + 300

—

SDA input bus free time when wakeup

function is enabled

tBUF

5(9) × tI3Ccyc + 4 × tTcyc + 300 —

START condition input hold time when

wakeup function is disabled

tSTAH

tI3Ccyc + 300

—

START condition input hold time when

wakeup function is enabled

tSTAH

1(5) × tI3Ccyc + tTcyc + 300

—

Repeated START condition input setup

time

tSTAS

1000

—

STOP condition input setup time

tSTOS

1000

—

Data input setup time

tSDAS

tI3Ccyc + 50

—

Data input hold time

tSDAH

—

SCL, SDA capacitive load

Cb*1

—

400

RA4E2 Datasheet

2. Electrical Characteristics

R01DS0413EJ0110 Rev.1.10

Feb 28, 2023

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