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85311AMILF датащи(PDF) 10 Page - Renesas Technology Corp

номер детали 85311AMILF
подробное описание детали  Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer
PDF  18 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

85311AMILF датащи(HTML) 10 Page - Renesas Technology Corp

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©2016 Integrated Device Technology, Inc.
Revision B, February 18, 2016
85311I Datasheet
Recommendations for Unused Output Pins
Outputs:
LVPECL Outputs
All unused LVPECL outputs can be left floating. We recommend that
there is no trace attached. Both sides of the differential output pair
should either be left floating or terminated.
Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
The differential outputs are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50
transmission lines. Matched impedance techniques should be used
to maximize operating frequency and minimize signal distortion.
Figures 3A and 3B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and clock
component process variations.
Figure 3A. 3.3V LVPECL Output Termination
Figure 3B. 3.3V LVPECL Output Termination
R1
84
R2
84
3.3V
R3
125
R4
125
Z
o = 50
Z
o = 50
Input
3.3V
3.3V
+
_



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