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71321LA55TFG датащи(PDF) 15 Page - Renesas Technology Corp |
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71321LA55TFG датащи(HTML) 15 Page - Renesas Technology Corp |
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15 / 19 page ![]() 6.42 71321SA/LA and 71421SA/LA High Speed 2K x 8 Dual-Port Static RAM with Interrupts Industrial and Commercial Temperature Ranges 15 Truth Table III — Address BUSY Arbitration Truth Table I. Non-Contention Read/Write Control(4) NOTES: 1. Pins BUSYL and BUSYR are both outputs for IDT71321 (Master). Both are inputs for IDT71421 (Slave). BUSYX outputs on the IDT71321 are open drain, not push- pull outputs. On slaves the BUSYX input internally inhibits writes. 2. 'L' if the inputs to the opposite port were stable prior to the address and enable inputs of this port. 'H' if the inputs to the opposite port became stable after the address and enable inputs of this port. If tAPS is not met, either BUSYL or BUSYR = LOW will result. BUSYL and BUSYR outputs can not be LOW simultaneously. 3. Writes to the left port are internally ignored when BUSYL outputs are driving LOW regardless of actual logic level on the pin. Writes to the right port are internally ignored when BUSYR outputs are driving LOW regardless of actual logic level on the pin. Truth Tables Truth Table II. Interrupt Flag(1,4) NOTES: 1. A0L – A10L ≠ A0R – A10R. 2. If BUSY = L, data is not written. 3. If BUSY = L, data may not be valid, see tWDD and tDDD timing. 4. 'H' = VIH, 'L' = VIL, 'X' = DON’T CARE, 'Z' = HIGH IMPEDANCE NOTES: 1. Assumes BUSYL = BUSYR = VIH 2. If BUSYL = VIL, then No Change. 3. If BUSYR = VIL, then No Change. 4. 'H' = HIGH, 'L' = LOW, 'X' = DON’T CARE Left or Right Port(1) Function R/W CE OE D0-7 X H X Z Port Disabled and in Power-Down Mode, ISB2 or ISB4 XH X Z CER = CEL = VIH, Power-Down Mode, ISB1 or ISB3 LL X DATAIN Data on Port Written Into Memory(2) HL L DATAOUT Data in Memory Output on Por t(3) H L H Z High Impedance Outputs 2691 tbl 12 Left Port Right Port Function R/WL CEL OEL A10L-A0L INTL R/WR CER OER A10R-A0R INTR L L X 7FF XXX X X L(2) Set Right INTR Flag X X XXX X L L 7FF H(3) Reset Right INTR Flag XXX X L(3) LL X 7FE X Set Left INTL Flag XL L 7FE H(2) XX X X X Reset Left INTL Flag 2691 tbl 13 Inputs Outputs Function CEL CER A0L-A10L A0R-A10R BUSYL(1) BUSYR(1) X X NO MATCH H H Normal H X MATCH H H Normal X H MATCH H H Normal L L MATCH (2) (2) Write Inhibit(3) 2691 tbl 14 |
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