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71V321 датащи(PDF) 2 Page - Renesas Technology Corp

номер детали 71V321
подробное описание детали  HIGH SPEED 3.3V 2K X 8 DUAL-PORT STATIC RAM WITH INTERRUPTS
PDF  16 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

71V321 датащи(HTML) 2 Page - Renesas Technology Corp

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6.42
71V321L
High Speed 3.3V 2K x 8 Dual-Port Static RAM with Interrupts
Industrial and Commercial Temperature Ranges
2
71V321
PLG52(4)
52-Pin PLCC
Top View
4L
I/O
5L
I/O
6L
I/O
7L
I/O
NC
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0R
1R
2R
3R
4R
6R
5R
A0L
OEL
A10L
INTL
BUSYL
R/
WL
CEL
VCC
CER
R/
WR
BUSYR
INTR
A10R
1
2
3
4
5
6
7
47
48
49
50
51
52
9 8
10
11
12
13
14
15
16
17
18
19
20
27
26
25
24
23
22
21
33
32
31
30
29
28
35
34
36 37 38 39 40 41 42 43 44 45 46
3026 drw 02
Pin Configurations(1,2,3)
Description
The IDT71V321 is a high-speed 2K x 8 Dual-Port Static RAMs
with internal interrupt logic for interprocessor communications. The
IDT71V321 is designed to be used as a stand-alone 8-bit Dual-Port
RAM.
The device provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access
for reads or writes to any location in memory. An automatic power
down feature, controlled by CE, permits the on chip circuitry of each
port to enter a very low standby power mode.
Fabricated using CMOS high-performance technology, these de-
vices typically operate on only 325mW of power. Low-power (L) ver-
sions offer battery backup data retention capability, with each Dual-Port
typically consuming 200µW from a 2V battery.
The IDT71V321 devices are packaged in a 52-pin PLCC, a 64-pin
TQFP (thin quad flatpack), and a 64-pin STQFP (super thin quad
flatpack).
71V321
PPG64(4)
PNG64(4)
64-Pin STQFP
64-Pin TQFP
Top View
89 10 11 12 13 14 15 16
12 3 456 7
46 45 44 43 42 41 40 39 38 37 36 35 34
47
48
33
17
18
19
20
32
31
30
29
28
27
26
25
24
23
22
21
49
50
51
52
63
62
61
60
59
58
57
56
55
54
53
64
GND
4L
I/O
5L
I/O
6L
I/O
7L
I/O
I/O0R
I/O1R
I/O2R
I/O3R
I/O4R
I/O5R
I/O3L
N/C
N/C
GND
N/C
N/C
A10R
VCC
BUSYL
R/
WL
CER
R/
WR
BUSYR
CEL
N/C
N/C
A10L
VCC
N/C
INTR
INTL
3026 drw 03
NOTES:
1. All VCC pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. J52-1 package body is approximately .75 in x .75 in x .17 in.
PP64-1 package body is approximately 10mm x 10mm x 1.4mm.
PN64-1 package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.



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