PCF2131 datasheet(57/86 Pages) NXP

57 / 86 page

NXP Semiconductors

PCF2131

Nano-power highly accurate RTC with integrated quartz crystal

aaa-041889

0 to n (data bytes

plus ACK)

DATA BYTE

LAST DATA BYTE

read bit

acknowledge

from PCF2131

set register

address

read register

data

write bit

no acknowledge

acknowledge

from master

STOP

acknowledge

from PCF2131

acknowledge

from PCF2131

00h to 36h

slave address

Figure 34. Bus protocol, reading from registers

7.16.3 Bus communication and battery backup operation

To save power during battery backup operation (see Section 7.5.1), the bus interfaces

are inactive. Therefore the communication via I2C- or SPI-bus should be terminated

before the supply of the PCF2131 is switched from VDD to VBAT.

With I2C interface, PCF2131 will terminate transaction before switching from VDD to VBAT,

with SPI interface, PCF2131 will corrupt SPI write and read data when battery switchover

occurs.

Remark: If the I2C-bus communication was terminated uncontrolled, the I2C-bus has to

be reinitialized by sending a STOP followed by a START after the device switched back

from battery backup operation to VDD supply operation.

7.17 Internal circuitry

aaa-041890

PCF2131

VDD

CLKOUT

SDA/CE

VSS

SDI

SCL

SDO

VBAT

INTA/B

TS1/2/3/4

BBS

IFS

Figure 35. Device diode protection diagram of PCF2131

PCF2131

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.1 — 15 October 2021

57 / 86

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