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VNF1048F датащи(PDF) 50 Page - STMicroelectronics |
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VNF1048F датащи(HTML) 50 Page - STMicroelectronics |
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50 / 52 page ![]() List of tables Table 1. Pin functions ....................................................................... 3 Table 2. Absolute maximum rating .............................................................. 4 Table 3. Thermal data....................................................................... 5 Table 4. Supply specification .................................................................. 6 Table 5. SPI logic inputs (CSN, SCK and SDI) specification ............................................. 7 Table 6. SPI logic outputs (SDO) Specification ...................................................... 7 Table 7. HWLO logic input pin specification ........................................................ 7 Table 8. DIAG logic output pin specification ........................................................ 7 Table 9. Device Thermal shutdown.............................................................. 7 Table 10. ST-SPI Specification: Timings ........................................................... 8 Table 11. Charge Pump Specification ............................................................. 8 Table 12. External FET Gate Driver Specification ..................................................... 8 Table 13. Current sense amplifier with integrated ADC ................................................. 9 Table 14. External FET VDS Protection ........................................................... 9 Table 15. Hard Short Circuit protection ........................................................... 10 Table 16. Overcurrent protection ............................................................... 11 Table 17. External FET Thermal Shutdown via NTC input .............................................. 12 Table 18. Bypass switch ..................................................................... 14 Table 19. VOUT A-to-D Conversion .............................................................. 14 Table 20. Command byte .................................................................... 26 Table 21. Input data byte 1 ................................................................... 26 Table 22. Input data byte 2 ................................................................... 26 Table 23. Input data byte 3 ................................................................... 26 Table 24. Global status byte .................................................................. 26 Table 25. Output data byte 1 .................................................................. 26 Table 26. Output data byte 2 .................................................................. 27 Table 27. Output data byte 3 .................................................................. 27 Table 28. Operating codes ................................................................... 27 Table 29. 0xFF: (SW_Reset) .................................................................. 29 Table 30. Clear all status registers (RAM access).................................................... 30 Table 31. Global status byte .................................................................. 30 Table 32. Global status byte - bit description ....................................................... 30 Table 33. RAM memory map (ID 12.1) ........................................................... 31 Table 34. ROM Memory Map (ID 12.2) ........................................................... 32 Table 35. CR#1: Control Register 1 (read/write); Address 01h (ID 13.1) .................................... 33 Table 36. CR#2: Control Register 2 (read/write); Address 02h (ID 13.20).................................... 34 Table 37. CR#3: Control Register 3 (read/write); Address 03h (ID 13.3) .................................... 34 Table 38. SR#1: Status Register 1; Address 11h (ID 14.1) .............................................. 35 Table 39. SR#2: Status Register 2; Address 12h (ID 14.2).............................................. 37 Table 40. SR#3: Status Register 3; Address 13h (ID 14.3).............................................. 37 Table 41. SR#4: Status Register 4; Address 14h (ID 14.4).............................................. 37 Table 42. SR#5: Status Register 5; Address 15h (ID 14.5).............................................. 37 Table 43. SR#6: Status Register 6; Address 16h (ID 14.6).............................................. 38 Table 44. SR#7: Status Register 7; Address 17h (ID 14.7).............................................. 38 Table 45. SR#8: Status Register 8; Address 18h (ID 14.8).............................................. 38 Table 46. QFN32L 5x5 mechanical data .......................................................... 45 Table 47. Tolerance of form and position .......................................................... 45 Table 48. Document revision history ............................................................. 46 VNF1048F List of tables DS13084 - Rev 6 page 50/52 |
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