LX27901

PRODUCTION DATASHEET

Microsemi

Analog Mixed Signal Group

11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570

Page 4

Copyright

 2011

Rev. 1.1

High Performance LED Controller

TM

®

ELECTRICAL CHARACTERISTICS

Unless otherwise listed, the following specifications apply over the operating ambient temperature of -40

°C < Temp < 85°C, and VIN = 7.5V to 27V, except

where otherwise noted and the following test conditions: VIN = 12V, CC_R = 330pF, RC_R= 15k

Parameters

Symbol

Test Conditions/Comments

MIN

TYP

MAX

Units

Fault Count

FC

At clock frequency of AOUT, BOUT

256

Count

Fault reset Interval

FRESET_1

Interval for resetting fault counter after POR, At

clock frequency of AOUT, BOUT

32768

Count

Fault reset Interval

FRESET_R

Periodic Interval for resetting fault counter, At

clock frequency of AOUT, BOUT

65536

Count

Fault Output Sinking Capacity

FSINK

VFAULT ≤ 0.8V, TA = 25°C

4

6

mA

Fault Output Open Impedance

RF

When in open state

5

MΩ

Bias & References

Soft Start Charging Source

ISSC

C_B Charging source at start up

2

µA

Power-Up Sequencing

Start up Time Out

TSTART

After POR

32768

Count

F U N C T I O N A L P I N D E S C R I P T I O N

Name

Pin #

Description

VIN

1

Input voltage pin. A built-in regulator is connected to this pin to step down the input voltage to the

internal operating voltage VDD. This pin can accept input voltage from 7.5V to 27V to provide the

flexibility of interfacing with either 12V or 24V system supply. A low ESR decoupling capacitor of

not less than 1µF should be connected from this pin to GND with low impedance traces.

ENABLE

2

Enable pin to control the on/off operation of the controller. A logic low signal <0.8V on this pin

sets the controller in sleep mode to save energy, and a signal > 1.7V activates the controller

operation. The DC signal level on this pin also sets the drive mode of the controller. With

VDD=5.25V

5%, when 1.7V<V

ENABLE<2.8V the AOUT, BOUT signal is set in LLC resonant drive

mode; when 3.2V<VENABLE<3.7V the controller drives the power converter in normal PWM drive

mode; and when VENABLE >4.3V the controller is set in synchronous LED drive mode.

C_R

3

Converter operating frequency programming terminal. A pull-up resistor from this pin to VDD and

a capacitor connected from this pin to ground determines the operating frequency of the inverter.

BRTA

4

Terminal for programming the analog LED current setting. An analog signal is accepted from this

pin to set the reference level for the LED current control loop.

DIM

5

PWM dimming control input. VDIM > 2V sets the dimming operation in continuous analog mode. A

PWM signal of low level <0.5V and high level > 2V will force the PWM dimming operation to follow

the PWM signal directly. Input level <0.5V will stop the controller output.

SST/BCOM

6

For PWM dimming brightness compensation and soft start. The elapsed dimming demand and

the accumulated LED current over the active dimming period are compared at this pin.

The

comparison result is used to control the LED light output to exactly match the dimming demand

with compensation for the distortion of the LED current during dimming operation. At start up this

pin is connected to a 2µA charging current source to control the soft start process. An internal

active pull down circuit is connected from this pin to COMP to force the COMP voltage rise slowly

with the charge of the capacitor at this pin. Soft start completes when the voltage rises to 2.5V

and the control enters normal operation mode. The 2µA charging source and the COMP pull

down circuit are disconnected then, and this pin is connected to the brightness compensation

circuit.

FAULT

7

Fault indication pin with open drain output.

Internally pulled down when an open LED string,