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STM32U595AI датащи(PDF) 261 Page - STMicroelectronics

номер детали STM32U595AI
подробное описание детали  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
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производитель  STMICROELECTRONICS [STMicroelectronics]
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DS13633 Rev 1
261/377
STM32U59xxx
Electrical characteristics
343
In the user application, the number of I/O pins tat can drive current must be limited to
respect the absolute maximum rating specified in Section 5.2: Absolute maximum ratings:
•
The sum of the currents sourced by all the I/Os on VDDIOx, plus the maximum
consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating
ΣIVDD (see Table 30: Current characteristics).
•
The sum of the currents sunk by all the I/Os on VSS, plus the maximum consumption of
the MCU sunk on VSS, cannot exceed the absolute maximum rating ΣIVSS
(see Table 30: Current characteristics).
Output voltage levels
Unless otherwise specified, the parameters given in the table below are derived from tests
performed under the ambient temperature and supply voltage conditions summarized in
Table 32. All I/Os are CMOS- and TTL-compliant (FT OR TT unless otherwise specified).
Table 85. Output voltage characteristics (all I/Os except FT_t I/Os in VBAT mode(1),
and FT_o I/Os)(2)(3)
Symbol
Parameter
Conditions
Min
Max
Unit
VOL
Output low-level voltage
CMOS port(4), |IIO| = 8 mA,
2.7 V ≤ VDDIOx ≤ 3.6 V
-0.4
V
VOH
Output high-level voltage
VDDIOx - 0.4
-
VOL(5)
Output low-level voltage
TTL port(4),|IIO| = 8 mA,
2.7 V ≤ VDDIOx ≤ 3.6 V
-0.4
VOH(5)
Output high-level voltage
2.4
-
VOL(5)
Output low-level voltage
All I/Os, |IIO| = 20 mA,
2.7 V ≤ VDDIOx ≤ 3.6 V
-1.3
VOH(5)
Output high-level voltage
VDDIOx - 1.3
-
VOL(5)
Output low-level voltage
|IIO| = 4 mA,
1.58 V ≤ VDDIOx ≤ 3.6 V
-0.4
VOH(5)
Output high-level voltage
VDDIOx - 0.4
-
VOL(5)
Output low-level voltage
|IIO| = 1 mA,
1.08 V ≤ VDDIOx <3.6 V
-0.4
VOH(5)
Output high-level voltage
VDDIOx - 0.4
-
VOLFM+(5)
Output low-level voltage for
a FT_f I/O pin in FM+ mode
|IIO| = 20 mA,
2.7 V ≤ VDDIOx ≤ 3.6 V
-0.4
|IIO| = 10 mA,
1.58 V ≤ VDDIOx ≤ 3.6 V
-0.4
|IIO| = 2 mA,
1.08 V ≤ VDDIOx < 3.6 V
-0.4
1. FT_t I/O characteristics are degraded only in VBAT mode (refer to Table 86).
2. The I/O structure options listed in this table can be a concatenation of options including the option explicitly listed. For
instance TT_a refers to any TT I/O with _a option. TT_xx refers to any TT I/O and FT_xx refers to any FT I/O.
3. The IIO current sourced or sunk by the device must always respect the absolute maximum rating specified in Table 30:
Current characteristics, and the sum of the currents sourced or sunk by all the I/Os (I/O ports and control pins) must always
respect the absolute maximum ratings ΣIIO.
4. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
5. Specified by design. Not tested in production.



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