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STM32H7B0AB датащи(PDF) 41 Page - STMicroelectronics |
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STM32H7B0AB датащи(HTML) 41 Page - STMicroelectronics |
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41 / 205 page ![]() Name Abbreviation Definition I/O structure _a analog option (supplied by VDDA) _u USB option (supplied by VDD33USB) _h0 (1) High-speed low voltage (mainly SDMMC2 on VDDMMC power rail) _h1(1) High-speed low voltage (mainly for OCTOSPI) _h2(1) High-speed low voltage (mainly for FMC) _h3(1) High-speed low voltage _s Secondary supply (supplied by VDDMMC) (2) Notes Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset. Pin functions Alternate functions Functions selected through GPIOx_AFR registers Additional functions Functions directly selected/enabled through peripheral registers 1. Refer to SYSCFG_CCCSR register in the device reference manual for how to set a group of I/Os in High-speed low-voltage mode. Depending on the chosen I/Os (for example OCTOSPI), it can belong to several groups of I/Os and several HSLVx bits need to be set (refer to Table Pin/ball definition). Take care that the VDDIO_HSLV and/or VDDMMC_HSLV option bits must also be set. 2. Refer to the table Features and peripheral counts for the list of packages featuring a VDDMMC separate supply pad. Table 7. STM32H7B0xB pin/ball definition Pin/ball name(1) (2) Pin name (function after reset) Pin type I/O structure Alternate functions Additional functions A2 C3 - 1 1 1 PE2 I/O FT_h2 TRACECLK, SAI1_CK1, SPI4_SCK, SAI1_MCLK_A, OCTOSPIM_P1_IO2, USART10_RX, FMC_A23, EVENTOUT - B2 B2 - 2 2 2 PE3 I/O FT_h2 TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX, FMC_A19, EVENTOUT - A1 B1 - 3 3 3 PE4 I/O FT_h2 TRACED1, SAI1_D2, DFSDM1_DATIN3, TIM15_CH1N, SPI4_SS, SAI1_FS_A, FMC_A20, DCMI_D4/PSSI_D4, LCD_B0, EVENTOUT - C3 D3 - 4 4 4 PE5 I/O FT_h2 TRACED2, SAI1_CK2, DFSDM1_CKIN3, TIM15_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6/PSSI_D6, LCD_G0, EVENTOUT - C2 E3 - 5 5 5 PE6 I/O FT_h2 TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, SAI1_SD_A, SAI2_MCK_B, TIM1_BKIN2_COMP12, FMC_A22, DCMI_D7/PSSI_D7, LCD_G1, EVENTOUT - B3 A1 - - - - VSS S - - - A3 - - - - - VDD S - - - E3 E2 1 6 6 6 VBAT S - - - D2 A15 - - - - VSS S - - - STM32H7B0xB Pin descriptions DS13196 - Rev 7 page 41/205 |
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