DocID029059 Rev 1

11/23

STGIPL30C60

Electrical characteristics

ISDh

SD logic “0” input bias

current

SD = 15 V

30

120

300

µA

ISDl

SD logic “1” input bias

current

SD = 0 V

3

µA

Dt

Dead time

see Figure 9 and

Table 15

600

ns

Table 11. Op-amp characteristics (VCC = 15 V unless otherwise specified)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Vio

Input offset voltage

Vic = 0 V, Vo = 7.5 V

6

mV

Iio

Input offset current

Vic = 0 V, Vo = 7.5 V

440

nA

Iib

Input bias current (1)

1.

The direction of input current is out of the IC.

100

200

nA

Vicm

Input common mode

voltage range

0V

VOL

Low level output voltage

RL = 10 kΩ to VCC

75

150

mV

VOH

High level output voltage

RL = 10 kΩ to GND

14

14.7

V

Io

Output short-circuit current

Source, Vid = +1; Vo = 0 V

16

30

mA

Sink, Vid = -1; Vo = VCC

50

80

mA

SR

Slew rate

Vi = 1 ¸ 4 V; CL = 100 pF;

unity gain

2.5

3.8

V/ms

GBWP

Gain bandwidth product

Vo = 7.5 V

8

12

MHz

Avd

Large signal voltage gain

RL = 2 kΩ

70

85

dB

SVR

Supply voltage rejection

ratio

vs VCC

60

75

dB

CMRR

Common mode rejection

ratio

55

70

dB

Table 10. Logic inputs (VCC = 15 V unless otherwise specified) (continued)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit