REV. C

OP490

–12–

High Output Amplifier

The amplifier shown in Figure 7 is capable of driving 25 V p-p

into a 1 k

W load. Design of the amplifier is based on a bridge

configuration. A amplifies the input signal and drives the load

with the help of B. Amplifier C is a unity-gain inverter which

drives the load with help from D. Gain of the high output amplifier

with the component values shown is 10, but can easily be changed

by varying R1 or R2.

Single-Supply Micropower Quad Programmable Gain Amplifier

The combination of quad OP490 and the DAC8408 quad 8-bit

CMOS DAC, creates a quad programmable-gain amplifier with

a quiescent supply drain of only 140

mA. The digital code present

at the DAC, which is easily set by a microprocessor, determines

the ratio between the fixed DAC feedback resistor and the resis-

tance of the DAC ladder presents to the op amp feedback loop.

Gain of each amplifier is:

V

Vn

OUT

IN

=-

256

+15V

–15V

1/4

OP490E

B

R1

1k

2

3

11

4

1

R2

9k

1/4

OP490E

B

6

5

7

R3

50

R4

50

R8

50

8

1/4

OP490E

C

13

12

9

10

1/4

OP490E

D

R6

5k

R7

50

R5

5k

14

Figure 7. High Output Amplifier

where n equals the decimal equivalent of the 8-bit digital code

present at the DAC. If the digital code present at the DAC

consists of all zeros, the feedback loop will be open causing the

op amp output to saturate. The 10 M

W resistors placed in paral-

lel with the DAC feedback loop eliminates this problem with a

very small reduction in gain accuracy. The 2.5 V reference biases

the amplifiers to the center of the linear region providing maximum

output swing.