Philips Semiconductors

Product specification

74LVC374A

Octal D-type flip-flop with 5-volt tolerant

inputs/outputs; positive edge-trigger (3-State)

1998 Jul 29

4

LOGIC DIAGRAM

Q

D

D0

Q0

D

D1

D

D2

D

D3

D

D4

D

D5

D

D6

D

D7

Q1

Q2

Q3

Q4

Q5

Q6

Q7

CP

OE

QQ

Q

Q

Q

Q

Q

SA00393

CP

CP

CP

CP

CP

CP

CP

CP

FF1

FF2

FF3

FF4

FF5

FF6

FF7

FF8

FUNCTION TABLE

OPERATING MODES

INPUTS

INTERNAL FLIP-FLOPS

OUTPUTS

OPERATING MODES

OE

LE

INTERNAL FLIP-FLOPS

Load and read register

L

L

°

°

l

h

L

H

L

H

Load register and

disable outputs

H

H

°

°

l

h

L

H

Z

Z

H = HIGH voltage level

h

= HIGH voltage level one setup time prior to the LOW-to-HIGH CP transition

L

= LOW voltage level

l

= LOW voltage level one setup time prior to the LOW-to-HIGH CP transition

Z = High impedance OFF-state

° = LOW-to-HIGH clock transition