UCS2113-C datasheet(21/60 Pages) MICROCHIP

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DS20006466A-page 21

UCS2113-C

5.4

Discrete Output Pins

5.4.1

ALERT#1 AND ALERT#2 OUTPUT

PINS

The UCS2113-C has two independent ALERT# out

pins. ALERT#1 is tied to the status of the VBUS1 pin.

ALERT#2 is tied to the status of the VBUS2 pin.

The ALERT# pin is an active-low open-drain interrupt

to the host controller. The ALERT# pin is asserted

when an error occurs. Also, when charge rationing is

enabled, the ALERT# pin is asserted by default when

the current rationing threshold is reached (as

determined by RATION_BEH<1:0>). The ALERT# pin

is released when all error conditions that may assert

the ALERT# pin (such as an error condition and charge

rationing) have been removed or reset as necessary.

The UCS2113-C is compatible with the Microchip hub

devices supporting single pin power control feature.

These hub devices have a single connection to the

PWR_EN and ALERT# pins of the UCS2113-C, which

are tied together in the application.

5.4.2

BOOST# OUTPUT PIN

The UCS2113-C provides a BOOST# output pin to

compensate for voltage drops during high loads. The

BOOST# pin is an active-low, open-drain output that

would be connected to a resistor in the DC-DC

converter’s

feedback

error

voltage

loop

(see

Figure 5-3).

The

BOOST#

asserted

when

VBUS Current > IBOOST. IBOOST typical value is 1.9A.

The BOOST# is OR’ed for both VBUS1 and VBUS2 ports.

When the BOOST# pin is asserted, it will remain in this

state for at least tBOOST_MAT (minimum assertion time).

FIGURE 5-3:

Boost# Pin Usage.

5.5

Discrete Input Pins

5.5.1

COMM_ILIM INPUT

The

COMM_ILIM

input

determines

the

communications mode, as shown in Table 6-1. This is

also the hardware strap for MAX Current Limit.

5.5.2

SMCLK

When operated in Stand-Alone mode, this pin should be

tied to ground. When the UCS2113-C is configured for

SMBus communications, the SMCLK is the clock input.

5.5.3

SMDATA

When used in Stand-Alone, this pin should be tied to

ground.

When the UCS2113-C is configured for SMBus

communications, the SMDATA is the data input/output.

5VOUT

R1 R2 R3

 V



--------------------------------------------------------

VOUT



R2 R3

 R

1 VFB



R3 R4



--------------------------------------------------------

VOUT



5VOUT

VFB

--------------------

------

–





 R1 VFB



------------------------



If R1 R3



VOUT



5VOUT R1



---------------------------------



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