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HC08KL8GRS/D датащи(PDF) 40 Page - NXP Semiconductors

номер детали HC08KL8GRS/D
подробное описание детали  High-Performance M68HC08 Architecture
PDF  256 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC08KL8GRS/D датащи(HTML) 40 Page - NXP Semiconductors

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Memory Map
General Release Specification
MC68HC08KL8 — Rev. 2.0
Memory Map
$0012
TIM Counter Register High
(TCNTH)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
0
0
0
0
0
0
0
0
$0013
TIM Counter Register Low
(TCNTL)
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
0
0
0
0
0
0
0
0
$0014
TIM Counter Modulo Register High
(TMODH)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$0015
TIM Counter Modulo Register Low
(TMODL)
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$0016
TIM Channel 0 Status and Control
Register (TSC0)
Read:
CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
$0017
TIM Channel 0 Register High
(TCH0H)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after Reset
$0018
TIM Channel 0 Register Low
(TCH0L)
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Indeterminate after Reset
$0019
TIM Channel 1 Status and Control
Register (TSC1)
Read:
CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
$001A
TIM Channel 1 Register High
(TCH1H)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after Reset
Addr.
Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R
= Reserved
X = Indeterminate
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 9)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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