74HC423DB datasheet(2/14 Pages) PHILIPS

2 / 14 page

1998 Jul 08

Philips Semiconductors

Product speciﬁcation

Dual retriggerable monostable

multivibrator with reset

74HC/HCT423

FEATURES

• DC triggered from active HIGH or active LOW inputs

• Retriggerable for very long pulses up to 100% duty

factor

• Direct reset terminates output pulse

• Schmitt-trigger action on all inputs except for the reset

input

• Output capability: standard (except for nREXT/CEXT)

• ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT423 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT423 are dual retriggerable monostable

multivibrators with output pulse width control by two

methods. The basic pulse time is programmed by

selection of an external resistor (REXT) and capacitor

(CEXT). The external resistor and capacitor are normally

connected as shown in Fig.6.

Once triggered, the basic output pulse width may be

extended by retriggering the gated active LOW-going edge

input (nA) or the active HIGH-going edge input (nB). By

repeating this process, the output pulse period

(nQ = HIGH, nQ = LOW) can be made as long as desired.

When nRD is LOW, it forces the nQ output LOW, the

nQ output HIGH and also inhibits the triggering.

Figures 7 and 8 illustrate pulse control by reset. The basic

output pulse width is essentially determined by the values

of the external timing components REXT and CEXT.

For pulse widths, when CEXT < 10 000 pF, see Fig.9.

When CEXT > 10 000 pF, the typical output pulse width is

defined as:

tW = 0.45 × REXT × CEXT (typ.),

where, tW = pulse width in ns;

REXT = external resistor in kΩ;

CEXT = external capacitor in pF.

Schmitt-trigger action in the nA and nB inputs, makes the

circuit highly tolerant to slower input rise and fall times.

The “423” is identical to the “123” but cannot be triggered

via the reset input.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi +∑ (CL × VCC2 × fo) + 0.75 × CEXT × VCC2 × fo + D × 16 × VCC where:

fi = input frequency in MHz

fo = output frequency in MHz

D = duty factor in %

∑ (CL × VCC2 × fo) = sum of outputs

CL = output load capacitance in pF

VCC = supply voltage in V

CEXT = timing capacitance in pF

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

HCT

tPHL/ tPLH

propagation delay

CL = 15 pF; VCC = 5 V;

REXT =5 kΩ; CEXT = 0 pF

nA, nB to nQ, nQ25

nRD to nQ, nQ20

input capacitance

3.5

minimum output pulse width nQ, nQ

notes 1 and 2

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