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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STW5093 датащи(PDF) 25 Page - STMicroelectronics |
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STW5093 датащи(HTML) 25 Page - STMicroelectronics |
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25 / 34 page  25/34 STW5093 Figure 6. A.C. TESTING INPUT, OUTPUT WAVEFORM ANALOG INTERFACES Symbol Parameter Test Condition Min. Typ. Max. Unit RMBIAS Switch Resistance for Microphone bias MBIAS 100mV under VCC 150 Ω IMIC Input Leakage GND < VMIC < VCC -100 +100 µA RMIC Input Resistance GND < VMIC < VCC 50 k Ω RLVFr Load Resistance 30 Ω CLVFr Load Capacitance 50 nF ROVFr0 Output Resistance Steady zero PCM code applied to DR; I = ±1mA 1.0 Ω RLvLr Load Resistance VLr+ to VLr- 8 Ω CLvLr Load Capacitance from VLr+ to VLr- 50 nF ROLVrO Output Resistance Steady zero PCM code applied to DR; I ± 1mA 1 Ω VOSVLrO Differential offset Voltage at VLr+, VLr- Alternating ± zero PCM code applied to DR maximum receive gain; RL = 50 Ω -50 +50 mV AC Testing: inputs are driven at 0.8VCCIO for a logic "1"and 0.2VCCIO for a logic "0 ". Timing measurements are made at 0.7VCCIO for a logic "1"and 0.3VCCIO for a logic "0". 0.8VCCIO 0.2VCCIO 0.7VCCIO 0.3VCCIO 0.7VCCIO 0.3VCCIO TEST POINTS INTPUT/OUTPUT D93TL077A |
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