R

EM6607

Copyright © 2005, EM Microelectronic-Marin SA

26

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12 Serial Write Buffer – SWB

The EM6607 has a simple Serial Write Buffer (SWB) which outputs serial data and serial clock.

The SWB is enabled by setting the bit V03 in the CLKSWB register as well as setting port D to output mode. The

combination of the possible PortD mode is shown in Table 34. In SWB mode the serial clock is output on port D0 and the

serial data is output on port D1.

The signal TestVar[3], which is used by the processor to make conditional jumps, indicates "Transmission finished" in

automatic send mode or "SWBbuffer empty" in interactive send mode. In interactive mode, TestVar[3] (see port A section) is

equivalent to the interrupt request flags stored in IntRq register : it permits to recognise the interrupt source. (See also the

interrupt handling section 9.Interrupt Controller for further information). To serve the "SWBbuffer empty " interrupt request,

one only has to make a conditional jump on TestVar[3].

Bits ClkSWB0 and ClkSWB1 in the ClkSWB register select the Serial Write Buffer output clock frequency. The

possible values are 1kHz (default), 2kHz, 8kHz or 16kHz and are shown in Table below:

Table 40.

SWB clock selection

SWB clock output

CkSWB1

CkSWB0

1024 Hz

0

0

2048 Hz

0

1

8192 Hz

1

0

16384 Hz

1

1

Table 41.

SWB clock selection register - ClkSWB

Bit

Name

Reset

R/W

Description

3

V03

0

R/W

Serial Write buffer selection

2

-

0

R

RESERVED - read 0

1

CkSWB1

0

R/W

SWB clock selector 1

0

CkSWB0

0

R/W

SWB clock selector 0

Table 42.

PortD status

PortD status

CIOPD

V03

PD0

PD1

PD2

PD3

« NORMAL »

0

0

input

input

input

input

« NORMAL »

0

1

input

input

input

input

« NORMAL »

1

0

output PD0

output PD1

output PD2

output PD3

« SWB »

1

1

serial clock Out

SWB serial data

output PD2

output PD3

When the SWB is enabled by setting the bit V03 TestVar[3], which is used to make conditional jumps, is reassigned to the

SWB and indicates either "SWBbuffer empty " interrupt or "Transmission finished" . After Power-on-RESET V03 is cleared

at "0" and TestVar[3] is consequently assigned to PA2 input terminal.

The SWB data is output on the rising edge of the clock. Consequently, on the receiver side the serial data can be evaluated

on falling edge of the serial clock edge.