поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

UPSD3422EB40U6 датащи(PDF) 70 Page - STMicroelectronics

номер детали UPSD3422EB40U6
подробное описание детали  Turbo Plus series Fast Turbo 8032 MCU with USB and programmable logic
PDF  300 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3422EB40U6 датащи(HTML) 70 Page - STMicroelectronics

Back Button UPSD3422EB40U6 Datasheet HTML 66Page - STMicroelectronics UPSD3422EB40U6 Datasheet HTML 67Page - STMicroelectronics UPSD3422EB40U6 Datasheet HTML 68Page - STMicroelectronics UPSD3422EB40U6 Datasheet HTML 69Page - STMicroelectronics UPSD3422EB40U6 Datasheet HTML 70Page - STMicroelectronics UPSD3422EB40U6 Datasheet HTML 71Page - STMicroelectronics UPSD3422EB40U6 Datasheet HTML 72Page - STMicroelectronics UPSD3422EB40U6 Datasheet HTML 73Page - STMicroelectronics UPSD3422EB40U6 Datasheet HTML 74Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 70 / 300 page
background image
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
MCU clock generation
UPSD3422, UPSD3433, UPSD3434, UPSD3454
70/300
Figure 13.
Clock generation logic
Table 27.
CCON0: clock control register (SFR F9h, reset value 50h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PLLM[4]
PLLEN
UPLLCE
DBGCE
CPUAR
CPUPS[2:0]
Table 28.
CCON0 register bit definition
Bit
Symbol
R/W
Definition
7
PLLM[4]
R,W
Upper bit of the 5-bit PLLM[4:0] Multiplier (Default: '0' for
PLLM = 00h)
6
PLLEN
R,W
PLL Enable
0 = Disable PLL operation
1 = Enable PLL operation (Default condition after reset)
5
UPLLCE
R,W
USB Clock Enable
0 = USB clock is disabled (Default condition after reset)
1 = USB clock is enabled
4DBGCE
R,W
Debug Unit Breakpoint Comparator Enable
0 = JTAG Debug Unit comparators are disabled
1 = JTAG Debug Unit comparators are enabled (Default
condition after reset)
XTAL1 /2
XTAL1 /4
XTAL1 /2048
Q
Q
Q
M
U
X
XTAL1 (default)
XTAL1 /8
XTAL1 /16
Q
Q
XTAL1 /32
XTAL1 /1024
Q
Q
0
1
2
3
4
5
6
7
CLK
PLL
EN
XTAL1
(fOSC)
PCON[1]
CCON0[6]
PCON[1]: PD,
Power-Down Mode
CCON[2:0],
Clock Pre-Scaler Select
PCON[0]: IDL,
Idle Mode
Clock Divider
MCU_CLK (fMCU)
(to: 8032, WDT)
PERIPH_CLK (fOSC)
(to: TIMER0/1/2, UART0/1, PCA0/1, SPI, I2C, ADC)
USB_CLK
3
AI10433b
Obsolete
Product(s)
- Obsolete
Product(s)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com