R31DS0087EU0101 Rev.1.01

Page 10

Sep.28.21

pcm4l Datasheet

Depending on the target equipment clock recommendation, one of the four reference tracker operating modes are

selected: Write Phase, Adaptive Time, Assisted Time, or Adaptive Frequency, and are described in this section.

The determination of which tracker mode to use will depend on the target equipment clock recommendation.

For frequency synchronization using the ITU-T G.8265.1 Profile, the Adaptive Frequency Reference Tracker

would be used. This is designed to meet ITU-T G.8263 (PEC-S-F) for the limits defined for case 3 in clause 7.2.2

of ITU-T G.8261.1 of <16ppb. Additionally, the Adaptive Time Reference Tracker would be used for the limits

defined for case 1 or 2 in clause 7.2.2 of G.8263.

For phase/time synchronization using the ITU-T G.8275.1 Profile, the Write Phase Reference Tracker would be

used. This will use the PTP Hardware Clock (PHC) adjust phase control and the Renesas network timing device’s

hardware filter to meet ITU-T G.8273.2 for telecom boundary clocks and telecom time slave clocks. Frequency

assistance would come from the co-located EEC1/eSEC, which is again supported by the Renesas network

timing device using our patented Combo mode, which provides the band-pass filtered noise transfer as defined in

clause 7.3.2 of ITU-T G.8273.2 for Class A/B and in clause 7.3.3 Class C/D.

For phase/time synchronization using the ITU-T G.8275.2 Profile, either the Adaptive Time Reference Tracker or

Assisted Time Reference Tracker would be used. These are designed to meet ITU-T G.8273.4 for telecom

boundary clocks and telecom time slave clocks for use with partial timing support or assisted partial timing support

from the network.

2.1.1

Write Phase Reference Tracker

A Write Phase Reference Tracker is used to track a master in a 1588-aware network, where the packet delay

variation (PDV) is small. A Write Phase Reference Tracker uses the Renesas hardware digital loop filter. A

software outlier filter is implemented to improve the reference tracking performance.

The update rate to the hardware loop filter is based on the Sync update rate (e.g., per the ITU-T G.8275.1 Profile,

this is 16 packets-per-second (pps)). The hardware loop filter must be set to a bandwidth in the range of 0.05Hz

and 0.1Hz, per ITU-T G.8273.2. For other profiles, the bandwidth should be set to about 1/50th of the Sync packet

rate (e.g., for the IEEE 1588 Default profile at 1pps, it would be 0.02Hz, or lower).

The outlier filter is implemented in software to improve the Write Phase Reference Tracker performance. If a

detected phase offset is off the mean value by the minimum outlier threshold, minOutlierThresholdNanoseconds

for consecutive outlier count threshold, minOutlierCountThreshold, the detected phase offset is declared as an

outlier and will not be written the DCO device. The phase offset statistics, the mean, and the standard deviation,

are updated by the Write Phase Reference Tracker on every transaction.

The Write Phase Reference Tracker has four stages when it starts tracking a master clock or after it has been

reset by the RTS:

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Stage 1: Snapping Stage. Upon entering this first tracking stage, the Write Phase Reference Tracker

estimates the local clock initial time offset and requests a phase snap if the offset is bigger than a threshold.

After this phase snap, the local clock will be close to the master clock. The reference tracker then switches to

use the PTP Hardware Clock (PHC) adjphase API.

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Stage 2: Converging Stage. Starting from this stage until the last stage, the Write Phase Reference Tracker

writes the phase offset to the adjphase API when a forward link or reverse link time stamp pair is received. This

stage takes about one minute to allow the local clock to converge to the master clock.

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Stage 3: Statistics Collecting Stage. At this stage, the tracker performs: collecting PDV statistics for outlier

filter; writing phase offset to adjphase API; detecting and reporting locked/un-locked states to reference tracker

supervisor. This stage takes 1 minute in 16 pps or higher packet rate. It will take longer time if the packet rate is

lower than 16 pps.

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Stage 4: Tracking Stage. At this stage, the tracker updates the PDV statistics and checks for outliers. For time

stamp pairs that are not outliers, the tracker writes the phase offset to the adjphase API and updates the state

(locked/unlocked) to reference tracker supervisor. The Write Phase Reference Tracker remains in this stage

until it is reset by the reference tracker supervisor.