LM2831XMF datasheet(13/27 Pages) NSC

13 / 27 page

Design Guide (Continued)

significantly with little detriment to the regulator stability. Like

the input capacitor, recommended multilayer ceramic ca-

pacitors are X7R or X5R types.

CATCH DIODE

The catch diode (D1) conducts during the switch off-time. A

Schottky diode is recommended for its fast switching times

and low forward voltage drop. The catch diode should be

chosen so that its current rating is greater than:

D1 =IOUT x (1-D)

The reverse breakdown rating of the diode must be at least

the maximum input voltage plus appropriate margin. To im-

prove efficiency, choose a Schottky diode with a low forward

voltage drop.

OUTPUT VOLTAGE

The output voltage is set using the following equation where

R2 is connected between the FB pin and GND, and R1 is

connected between V

O and the FB pin. A good value for R2

is 10k. When designing a unity gain converter (Vo = 0.6V),

R1 should be between 0

Ω and 100Ω, and R2 should be

equal or greater than 10k

Ω.

REF = 0.60V

PCB LAYOUT CONSIDERATIONS

When planning layout there are a few things to consider

when trying to achieve a clean, regulated output. The most

important consideration is the close coupling of the GND

connections of the input capacitor and the catch diode D1.

These ground ends should be close to one another and be

connected to the GND plane with at least two through-holes.

Place these components as close to the IC as possible. Next

in importance is the location of the GND connection of the

output capacitor, which should be near the GND connections

of CIN and D1. There should be a continuous ground plane

on the bottom layer of a two-layer board except under the

switching node island. The FB pin is a high impedance node

and care should be taken to make the FB trace short to avoid

noise pickup and inaccurate regulation. The feedback resis-

tors should be placed as close as possible to the IC, with the

GND of R1 placed as close as possible to the GND of the IC.

The V

OUT trace to R2 should be routed away from the

inductor and any other traces that are switching. High AC

currents flow through the V

IN, SW and VOUT traces, so they

should be as short and wide as possible. However, making

the traces wide increases radiated noise, so the designer

must make this trade-off. Radiated noise can be decreased

by choosing a shielded inductor. The remaining components

should also be placed as close as possible to the IC. Please

see Application Note AN-1229 for further considerations and

the LM2831 demo board as an example of a four-layer

layout.

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