MPC5534 datasheet(22/50 Pages) FREESCALE

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MPC5534 Microcontroller Data Sheet, Rev. 0

Preliminary—Subject to Change Without Notice

Electrical Characteristics

Freescale Semiconductor

3.11

H7Fb Flash Memory Electrical Characteristics

Table 16 shows the FLASH_BIU settings versus frequency of operation. Refer to the device Reference

Manual for definitions of these bit-fields.

Table 14. Flash Program and Erase Specifications1

1 Typical program and erase times assume nominal supply values and operation at 25 oC.

Num

Characteristic

Symbol

Min

Typ

Initial

Max2

2 Initial factory condition:

≤ 100 program/erase cycles, 25 oC, typical supply voltage, 80MHz minimum system frequency.

Max3

3 The maximum erase time occurs after the specified number of program/erase cycles. This maximum value is characterized

but not guaranteed.

Unit

Double Word (64 bits) Program Time4

4 Actual hardware programming times. This does not include software overhead.

Tdwprogram

—10

—

500

µs

Page Program Time4

Tpprogram

—22

445

5 Page size is 128 bits (4 words).

500

µs

16 Kbyte Block Pre-program and Erase Time

T16kpperase

—

265

400

5000

48 Kbyte Block Pre-program and Erase Time

T48kpperase

—

340

400

5000

64 Kbyte Block Pre-program and Erase Time

T64kpperase

—

400

500

5000

128 Kbyte Block Pre-program and Erase Time

T128kpperase

—

500

1250

15,000

Minimum operating frequency for program and erase

operations6

6 Read frequency of the flash can be up to the maximum operating frequency of the device. There is no minimum read frequency

condition.

—25

—

MHz

Table 15. Flash EEPROM Module Life (Full Temperature Range)

Num

Characteristic

Symbol

Min

Typical1

1 Typical endurance is evaluated at 25C. Product qualification is performed to the minimum specification. For additional

information on the Freescale definition of Typical Endurance, please refer to Engineering Bulletin EB619 “Typical Endurance

for Nonvolatile Memory.”

Unit

Number of Program/Erase cycles per block for 16 Kbyte, 48 Kbyte, and 64

Kbyte blocks over the operating temperature range (TJ)

P/E

100,000

—

cycles

Number of Program/Erase cycles per block for 128 Kbyte blocks over the

operating temperature range (TJ)

P/E

10,000

100,000

cycles

Data retention

Blocks with 0 – 1,000 P/E cycles

Blocks with 1,001 – 100,000 P/E cycles

Retention

—years

Table 16. FLASH_BIU Settings vs. Frequency of Operation1

Target2 Maximum

Frequency (MHz)

APC

RWSC

WWSC

DPFEN

IPFEN

PFLIM

BFEN

up to and including 25 MHz3

0b000

0b01

0b0, 0b14 0b0, 0b14

0b00-

0b1x5

0b0, 0b16

up to and including 50 MHz

0b001

0b01

0b0, 0b14 0b0, 0b14

0b00-

0b1x5

0b0, 0b16

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