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MCP9600TE/MX датащи(PDF) 20 Page - Microchip Technology |
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MCP9600TE/MX датащи(HTML) 20 Page - Microchip Technology |
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20 / 57 page ![]() 2015-2021 Microchip Technology Inc. DS20005426G-page 20 MCP960X/L0X/RL0X 4.0 SERIAL COMMUNICATION 4.1 Two-Wire Standard Mode I2C Protocol-Compatible Interface The MCP960X/L0X/RL0X Serial Clock Input (SCL) and the bidirectional Serial Data Line (SDA) form a two-wire bidirectional data communication line (refer to the Input/Output Pin DC Characteristics table and Sensor Serial Interface Timing Specifications table). The following bus protocol has been defined: 4.1.1 DATA TRANSFER Data transfers are initiated by a Start condition (START), followed by a 7-bit device address and a read/write bit. An Acknowledge (ACK) from the device confirms the reception of each byte. Each access must be terminated by a Stop condition (STOP). Repeated communication is initiated after tB-FREE. This device supports the Receive Protocol. The register can be specified using the pointer for the initial read. Each repeated read or receive begins with a Start condition and address byte. The MCP960X/L0X/RL0X retains the previously selected register. Therefore, it outputs data from the previously-specified register (repeated pointer specification is not necessary). 4.1.2 HOST/DEVICE The bus is controlled by a host device (typically a microcontroller) that controls the bus access, and generates the Start and Stop conditions. The MCP960X/L0X/RL0X is a device and does not control other devices in the bus. Both host and device can operate as either transmitter or receiver. However, the host device determines which mode is activated. 4.1.3 START/STOP CONDITION A high-to-low transition of the SDA line (while SCL is high) is the Start condition. All data transfers must be preceded by a Start condition from the host. A low-to-high transition of the SDA line (while SCL is high) signifies a Stop condition. If a Start or Stop condition is introduced during data transmission, the MCP960X/L0X/RL0X releases the bus. All data transfers are ended by a Stop condition from the host. 4.1.4 ADDRESS BYTE Following the Start condition, the host must transmit an 8-bit address byte to the MCP960X/L0X/RL0X. The address for the MCP960X/L0X/RL0X temperature sensor is ‘11,0,0,A2,A1,A0’ in binary, where the A2, A1 and A0 bits are set externally by connecting the corresponding VADDR voltage levels on the ADDR pin (see the “Input/Output Pin DC Characteristics” section). The 7-bit address transmitted in the serial bit stream must match the selected address for the MCP960X/L0X/RL0X to respond with an ACK. Bit 8 in the address byte is a read/write bit. Setting this bit to ‘1’ commands a read oper- ation, while ‘0’ commands a write operation (see Figure 4-1). FIGURE 4-1: Device Addressing. TABLE 4-1: MCP960X/L0X/RL0X SERIAL BUS PROTOCOL DESCRIPTIONS Term Description Host The device that controls the serial bus, typically a microcontroller Device The device addressed by the host, such as the MCP960X/L0X/RL0X Transmitter Device sending data to the bus Receiver Device receiving data from the bus START A unique signal from host to initiate serial interface with a device STOP A unique signal from the host to terminate serial interface from a device Read/Write A read or write to the MCP960X/L0X/RL0X registers ACK A receiver Acknowledges (ACK) the reception of each byte by polling the bus NAK A receiver Not Acknowledges (NAK) or releases the bus to show End-of-Data (EOD) Busy Communication is not possible because the bus is in use Not Busy The bus is in the Idle state, both SDA and SCL remain high Data Valid SDA must remain stable before SCL becomes high in order for a data bit to be considered valid. During normal data transfers, SDA only changes state while SCL is low. 1 2345 67 8 9 SCL SDA 11 0 0 A2 A1 A0 Start Command Byte Address R/W MCP960X/L0X/RL0X Response A C K |
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