MCP1502

DS20006593A-page 8

 2021 Microchip Technology Inc. and its subsidiaries

2.1.6

LOAD REGULATION

An ideal voltage reference will maintain the specified

output voltage regardless of the load’s current demand.

However, real devices experience a small error voltage

that deviates from the specified output voltage when a

load is present.

Load regulation is defined as the voltage difference

when under no load (VOUT @ IOUT|0) and under maxi-

mum load (VOUT @ IOUT|MAX), and is expressed as a

percentage, as shown in Equation 2-7.

EQUATION 2-7:

Similar to line regulation, load regulation may also be

expressed as %/mA or in ppm/mA, as shown in

Equation 2-8 and Equation 2-9, respectively.

EQUATION 2-8:

EQUATION 2-9:

As an example, if the MCP1502-20 is implemented in a

design and a 10 μV change in output voltage is

measured from a 2 mA change in the output load, then

the error in percent, ppm/mA, is as shown in

Equation 2-10 and Equation 2-11.

EQUATION 2-10:

EQUATION 2-11:

2.1.7

POWER SUPPLY REJECTION

RATIO (PSRR)

Power Supply Rejection Ratio (PSRR) is a measure of

the change in Output Voltage (ΔVOUT) relative to the

change in Input Voltage (ΔVIN) over frequency.

2.1.8

LONG-TERM DRIFT

The long-term output stability is measured by exposing

the devices to an ambient temperature of +25°C.

2.1.9

OUTPUT VOLTAGE HYSTERESIS

The output voltage hysteresis is a measure of the out-

put voltage error after the powered devices are cycled

over the entire operating temperature range. The

amount of hysteresis can be quantified by measuring

the change in the +25°C output voltage after tempera-

ture excursions from +25°C to +125°C to +25°C, and

also from +25°C to -40°C to +25°C.

2.1.10

LAYOUT CONSIDERATION FOR

LOAD REGULATION

For applications which require high currents and/or

highly variable currents, the PCB layout is important for

minimizing the load coefficient (variation in output

voltage vs. load current) of the device. Of particular

importance is the grounding of the device to a large

ground plane with good thermal mass. The MCP1502

should not be placed on a small daughter card, or con-

nected to ground via long traces or single vias if the

load coefficient is to be optimized; the additional power

dissipation caused by the high load current will cause a

small change in the output voltage due to self-heating

of the device.

For systems with high ground currents, variations in the

local ground can also be a source of the load coefficient.

These are usually solved by ensuring the local ground for

the device is shared with the Point-of-Load (POL). In

some cases, it may be necessary to ensure the device

ground is specifically Kelvin sourced from the

Point-of-Load, such that a zero IR drop from unassociated

circuitry is seen on the device output voltage.

VOUT @ IOUT|0 VOUT @ IOUT|MAX

–

VOUT @ IOUT|0

-------------------------------------------------------------------------------------------------------------- 100%



% Load Regulation

=

V

OUT

VOUT NOM



-----------------------------------







I

OUT

----------------------------------------- 100%



%

mA

-------- Load Regulation

=

V

OUT

VOUT NOM



-----------------------------------







I

OUT

----------------------------------------- 10

6



ppm

mA

----------- Load Regulation

=

2.048V 2.04799V

–

2.04799V

-----------------------------------------------100%

.

=



0004882%

V

OUT

VOUT NOM



------------------------------------







I

OUT

------------------------------------------

10

6



10

V

2.048V

-----------------





2 mA

-----------------------











10

6



2.441

ppm

mA

-----------

=

=