Philips Semiconductors

Product specification

74ALS620A/74ALS620A-1

74ALS623A/74ALS623A-1

Transceivers

74ALS620A/74ALS620A-1 Octal bus transceiver, inverting (3-State)

74ALS623A/74ALS623A-1 Octal bus transceiver, non-inverting (3-State)

2

1991 Feb 08

853–0020 01670

FEATURES

TYPE

TYPICAL

PROPAGATION

DELAY

TYPICAL

SUPPLY CURRENT

(TOTAL)

74ALS620A/620A-1

4.0ns

33mA

74ALS623A/623A-1

4.0ns

38mA

ORDERING INFORMATION

ORDER CODE

DESCRIPTION

COMMERCIAL RANGE

DRAWING

NUMBER

20-pin plastic DIP

74ALS620AN, 74ALS620A-1N

74ALS623AN, 74ALS623A-1N

SOT146-1

20-pin plastic SOL

74ALS620AD, 74ALS620A-1D

74ALS623AD, 74ALS623A-1D

SOT163-1

DESCRIPTION

The 74ALS620A and 74ALS623A are octal transceiver featuring

3-State bus compatible outputs in both transmit and receive

directions. The 74ALS620A is an inverting version of the

74ALS623A. The outputs are capable of sinking 24mA and sourcing

up to 15mA, providing very good capacitive drive characteristics.

The outputs for the 74ALS620A-1 and 74ALS623A are capable of

sinking up to 48mA when within the

These octal bus transceivers are designed for asynchronous

two-way communication between data buses. The control function

implementation allows for maximum flexibility in timing.

These devices allow data transmission from the A bus to the B bus

or from B bus to A bus, depending on the logic levels at the enable

inputs (OEBA and OEAB). The enable inputs can be used to disable

the device so that the buses are effectively isolated. The

dual-enable configuration gives the 74ALS620A and 74ALS623A the

capability to store data by the simultaneous enabling of OEBA and

OEAB. Each output reinforces its input in this transceiver

configuration. Thus when both control inputs are enabled and all

other data sources to the two sets of the bus lines are at high

impedance, both sets of the bus lines (16 in all) will remain at their

last states.

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74ALS (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

A0 – A7, B0 – B7

Data inputs

1.0/1.0

20

µA/0.1mA

OEBA, OEAB

Output Enable inputs

1.0/1.0

20

µA/0.1mA

A0 – A7, B0 – B7

Data outputs

750/240

15mA/24mA

A0 – A7, B0 – B7

Data outputs (-1 version)

750/480

15mA/48mA

NOTE:

One (1.0) ALS unit load is defined as: 20

µA in the High state and 0.1mA in the Low state.

PIN CONFIGURATION – 74ALS620A/74ALS620A-1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

OEAB

A0

A1

A2

A3

A4

A5

A6

A7

GND

OEBA

B0

B1

B2

B3

B4

B6

B5

B7

SC00101

PIN CONFIGURATION – 74ALS623A/74ALS623A-1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

OEAB

A0

A1

A2

A3

A4

A5

A6

A7

GND

OEBA

B0

B1

B2

B3

B4

B6

B5

B7

SC00102