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999 датащи(PDF) 2 Page - NXP Semiconductors

номер детали 999
подробное описание детали  Octal latched transceiver with dual enable 3-State
PDF  12 Pages
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производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

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Philips Semiconductors
Product specification
74ABT543A
Octal latched transceiver with dual enable
(3-State)
2
1998 Sep 24
853-1794 20080
FEATURES
• Combines 74ABT245 and 74ABT373 type functions in one device
• 8-bit octal transceiver with D-type latch
• Back-to-back registers for storage
• Separate controls for data flow in each direction
• Output capability: +64mA/–32mA
• Live insertion/extraction permitted
• Power-up 3-State
• Power-up reset
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT543A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT543A Octal Registered Transceiver contains two sets of
D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB, LEBA) and Output Enable
(OEAB, OEBA) inputs are provided for each register to permit
independent control of data transfer in either direction. The outputs
are guaranteed to sink 64mA.
FUNCTIONAL DESCRIPTION
The 74ABT543A contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB) input and the A-to-B Latch
Enable (LEAB) input are Low the A-to-B path is transparent. A
subsequent Low-to-High transition of the LEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB and OEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the EBA, LEBA,
and OEBA inputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH
tPHL
Propagation delay
An to Bn or Bn to An
CL = 50pF; VCC = 5V
2.9
3.6
ns
CIN
Input capacitance
VI = 0V or VCC
4
pF
CI/O
I/O capacitance
Outputs disabled;
VO = 0V or VCC
7
pF
ICCZ
Total supply current
Outputs disabled; VCC =5.5V
110
µA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
24-Pin Plastic DIP
–40
°C to +85°C
74ABT543A N
74ABT543A N
SOT222-1
24-Pin plastic SO
–40
°C to +85°C
74ABT543A D
74ABT543A D
SOT137-1
24-Pin Plastic SSOP Type II
–40
°C to +85°C
74ABT543A DB
74ABT543A DB
SOT340-1
24-Pin Plastic TSSOP Type I
–40
°C to +85°C
74ABT543A PW
7ABT543APW DH
SOT355-1
PIN CONFIGURATION
24
23
22
21
20
19
18
17
16
10
15
9
8
7
6
5
4
3
2
1
VCC
EBA
B0
B1
B2
B3
B4
B5
B6
B7
OEBA
A0
A1
A2
A3
A4
A5
A6
A7
LEBA
14
12
13
11
LEAB
OEAB
EAB
GND
SA00168
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
14, 1
LEAB / LEBA
A to B / B to A Latch Enable
input (active-Low)
11, 23
EAB / EBA
A to B / B to A Enable input
(active-Low)
13, 2
OEAB / OEBA
A to B / B to A Output Enable
input (active-Low)
3, 4, 5, 6,
7, 8, 9, 10
A0 – A7
Port A, 3-State outputs
22, 21, 20, 19,
18, 17, 16, 15
B0 – B7
Port B, 3-State outputs
12
GND
Ground (0V)
24
VCC
Positive supply voltage



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