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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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XRT75R06 датащи(PDF) 21 Page - Exar Corporation |
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XRT75R06 датащи(HTML) 21 Page - Exar Corporation |
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21 / 63 page  áç áç áç áç XRT75R06 SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.0 18 3.0 THE RECEIVER SECTION The receiver is designed so that the LIU can recover clock and data from an attenuated line signal caused by cable loss or flat loss according to industry specifications. Once data is recovered, it is processed and presented at the receiver outputs according to the format chosen to interface with a Framer/Mapper or ASIC. This section describes the detailed operation of various blocks within the receive path. A simplified block diagram of the receive path is shown in Figure 6. FIGURE 6. RECEIVE PATH BLOCK DIAGRAM 3.1 Receive Line Interface Physical Layer devices are AC coupled to a line interface through a 1:1 transformer. The transformer provides isolation and a level shift by blocking the DC offset of the incoming data stream. The typical medium for the line interface is a 75 Ω coxial cable. Whether using E3, DS-3 or STS-1, the LIU requires the same bill of materials, see Figure 7. FIGURE 7. RECEIVE LINE INTERFACECONNECTION Channel n HDB3/ B3ZS Decoder MUX AGC/ Equalizer Peak Detector LOS Detector Slicer Jitter Attenuator Clock & Data Recovery RxClk_n RxPOS_n RxNEG/LCV_n RLOS_n RTIP_n RRing_n DS-3/E3/STS-1 1:1 Receiver 75 Ω RLOS_n RTIP_n RRing_n 37.5 Ω 0.01 µF 37.5 Ω |
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