XR72L52 datasheet(21/480 Pages) EXAR

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XRT72L52

TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

REV. 1.0.1

TxNEG[0]

Transmit Negative Polarity Pulse:

The exact role of this output pin depends upon whether the Framer is operating

in the Unipolar or Bipolar Mode.

Unipolar Mode:

This output signal pulses "High" for one bit period at the end of each outbound

DS3 or E3 frame. This output signal is at a logic "Low" for all of the remaining

bit-periods of the outbound DS3 or E3 frames

Bipolar Mode:

This output pin functions as one of the two dual-rail output signals that com-

mands the sequence of pulses to be driven on the line. TxPOS is the other out-

put pin. This input is typically connected to the TNDATA input of the external

DS3/E3 Line Interface Unit IC. When this output is asserted, it commands the

LIU to generate a negative polarity pulse on the line.

TxPOS[0]

Transmit Positive Polarity Pulse:

The exact role of this output pin depends upon whether the Framer is operating

in the Unipolar or Bipolar Mode.

Unipolar Mode:

This output pin functions as the Single-Rail output signal for the outbound DS3

or E3 data stream. The signal at this output pin is updated on the user-selected

edge of the TxLineClk signal.

Bipolar Mode:

This output pin functions as one of the two dual rail output signals that com-

mands the sequence of pulses to be driven on the line. TxNEG is the other out-

put pin. This input is typically connected to the TPDATA input of the external

DS3 or E3 Line Interface Unit IC. When this output is asserted, it commands the

LIU to generate a positive polarity pulse on the line

TxLineClk[0]

Transmit Line Interface Clock:

This clock signal is output to the Line Interface Framer along with the TxPOS

and TxNEG signals. This output clock signal provides the LIU with timing infor-

mation that it can use to generate the AMI pulses and deliver them over the

transmission medium to the Far-End Receiver. The source of this clock can be

configured to be either the RxLineClk from the Receiver portion of the Framer or

the TxInClk input. The nominal frequency of this clock signal is 34.368 MHz.

VDD

****

Power Supply 3.3V + 5%

TxFrameRef[0]

Transmit Framer Reference Input:

This input pin functions as the Transmit Frame Generation reference signal if the

XRT72L52 has been configured to operate in the Local-Time/Frame Slave

Mode. If the XRT72L52 has been configured to operate in the Local-Time/

Frame-Slave Mode, then the user's terminal equipment is expected to apply a

pulse to this input pin once every 106.4 microseconds for DS3 applications,

once every 125 microseconds for E3, ITU-T G.832 applications or once every

44.7 microseconds for E3, ITU-T G.751 applications.

In the Local-Time/Frame-Slave Mode, the Transmit Section of the XRT72L52

Framer initiates its generation of a new outbound DS3 or E3 frame upon the ris-

ing edge of this signal.

NOTE: To configure the XRT72L52 Framer to operate in the Local Time/Frame

Slave Mode, write "xxxx xx01" into the Framer Operating Mode Register

(Address = 0x00).

PIN DESCRIPTION

PIN #PIN NAME

TYPE

DESCRIPTION

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