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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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48LM01 датащи(PDF) 19 Page - Microchip Technology |
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48LM01 датащи(HTML) 19 Page - Microchip Technology |
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19 / 40 page  2018-2019 Microchip Technology Inc. DS20006008C-page 19 48L512/48LM01 8.1.2 CONTINUOUS WRITE Writing to a number of SRAM bytes is similar to a byte write, however, more bytes can be added after the first byte in the same write cycle. If more bytes of data are transmitted than what will fit to the end of that memory array, the address counter will “roll over” to the beginning of the SRAM array. Previously written data will be overwritten. Upon completion of the write, the 48L512/48LM01 automatically returns to the Write Disable state (STATUS register bit WEL = 0). FIGURE 8-2: CONTINUOUS SRAM WRITE WAVEFORM Note: If the CS pin is deselected at somewhere other than the end of an 8-bit byte boundary, the last partial byte operation will be aborted and the completed bytes will be written to the SRAM array. CS SCK 1 02 3 4 5 6 7 SI DD D D D D D D Data In Byte n MSb High-Impedance SO 0 000 0 0 1 0 DD D D D D D WRITE Opcode Data In Byte 1 D MSb MSb Address (2 or 3 bytes) AAAA A MSb AA A |
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