DA9155M

2.5 A Companion Charger for Rapid Charging

Datasheet

Revision 3.2

25-Feb-2022

CFR0011-120-00 Rev 5

11 of 37

© 2022 Renesas Electronics

7.4

2-Wire Interface

Figure 3: 2-Wire Interface Timing

Unless otherwise noted, the following is valid for TA = -40 to +85 ºC, VIN = 4.3 to 13.5 V, VBAT = 2.6 to 4.4 V

Table 10: 2-Wire Interface

Parameter

Symbol

Test conditions

Min

Typ

Max

Unit

Spike suppression (SCL,

SDA)

tSP

Fast/fast+ mode

0

50

ns

High speed mode

0

10

ns

Bus free time from STOP

to START condition

tBUF

0.5

µs

Bus line capacitive load

150

pF

Standard/Fast/Fast+ mode

SCL clock frequency

fSCL

Note 4

0

1000

kHz

Start condition setup

time

tSU_STA

0.26

us

Start condition hold time

tH_STA

0.26

us

SCL low time

tW_CL

0.5

us

SCL high time

tW_CH

0.26

us

2-wire SCL and SDA rise

time

tR

1000

ns

2-wire SCL and SDA fall

time

tR

300

ns

Data setup time

tSU_D

50

ns

Data hold-time

tH_D

0

ns

Stop condition setup

time

tSU_STO

0.26

us

High speed mode

SCL clock frequency

fSCL

Requires

VDDIO

≥ 1.8 V

(Note 4)

0

3400

kHz

Start condition setup

time

tSU_STA

160

ns

SDA

SCL

70%

30%

tF

tR

tBUF

70%

30%

1/fSCL

tSU_STA

tH_STA

tW_CH

tW_CL

tR

tF

tH_D

tSU_D

tSP

P

S

tSU_STO