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AP64202 датащи(PDF) 18 Page - Diodes Incorporated |
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AP64202 датащи(HTML) 18 Page - Diodes Incorporated |
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18 / 21 page ![]() AP64202 Document number: DS43574 Rev. 1 - 2 18 of 21 www.diodes.com March 2021 © Diodes Incorporated AP64202 Layout PCB Layout 1. The AP64202 works at 2A load current so heat dissipation is a major concern in the layout of the PCB. 2oz copper for both the top and bottom layers is recommended. 2. Place the input capacitors as closely across VIN and GND as possible. 3. Place the inductor as close to SW as possible. 4. Place the output capacitors as close to GND as possible. 5. Place the feedback components as close to FB as possible. 6. If using four or more layers, use at least the 2nd and 3rd layers as GND to maximize thermal performance. 7. Add as many vias as possible around both the GND pin and under the GND plane for heat dissipation to all the GND layers. 8. Add as many vias as possible around both the VIN pin and under the VIN plane for heat dissipation to all the VIN layers. 9. See Figure 28 for more details. C2 EXPOSED PAD BST VIN EN RT/CLK FB SS GND SW C3 R1 R2 RT VIN VOUT GND SW Figure 28. Recommended PCB Layout |
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