AP64100Q

Document number: DS43575 Rev. 1 - 2

22 of 26

www.diodes.com

July 2021

© Diodes Incorporated

AP64100Q

Application Information (continued)

16

External Loop Compensation Design (continued)

AP64100Q

VIN

EN

SW

BST

FB

GND

INPUT

R1

21.5kΩ

C4

OPEN

R2

10kΩ

L

10μH

C3

100nF

C2

22µF

C1

2 x 10µF

OUTPUT

VOUT

2.5V

RT/CLK

COMP

R5

3.48kΩ

C5

10nF

RT

200kΩ

C6

OPEN

VIN

12V

Figure 31. Example Circuit with Calculated Component Values for Loop Compensation

The first-order calculated loop response has the following characteristics:



Bandwidth is around 13.2kHz



Phase Margin is around 74.4°



Gain Margin is around -12.6dB

Figure 32. Closed-Loop Bandwidth

Figure 33. Closed-Loop Phase Margin

-100

-80

-60

-40

-20

0

20

40

60

80

100

100

1,000

10,000

100,000

1,000,000

Frequency (Hz)

-250

-200

-150

-100

-50

0

50

100

150

200

250

100

1,000

10,000

100,000

1,000,000

Frequency (Hz)