Page 1
June 2001
FS8108 Low Power Phase-Locked Loop IC
HiMARK Technology, Inc. reserves the right to change the product described in this datasheet. All information con-
tained in this datasheet is subject to change without prior notice. HiMARK Technology, Inc. assumes no responsibility
for the use of any circuits shown in this datasheet.
Description
The FS8108 is a serial data input, phase-locked loop IC with programmable input and ref-
erence frequency dividers. When combined with a VCO, the FS8108 becomes the core of
a very low power frequency synthesizer well-suited for mobile communication applica-
tions such as paging systems. The FS8108 includes an 18-bit programmable input fre-
quency divider and also implements a separate pin for stand-by control.
Features
High maximum input operating frequency — 185 MHz at V
DD1 = 1.0 V
Up to 22 MHz internal crystal oscillator reference frequency at V
DD1 = 1.0 V
Extremely low current consumption (I
DD,total typically 0.4 mA at fFIN = 90 MHz)
18-bit programmable input frequency divider (including a
÷ 64/65 prescaler) with
divide ratio range from 4032 to 262143
13-bit programmable reference frequency divider (including a
÷ 8 prescaler) with
divide ratio range from 40 to 65528
Optional lock detector output
Charge pump output for passive low-pass filter
Quick-lock signal output for faster locking
Separate pin for stand-by control
TSSOP 16L package (0.65mm pitch)
Applications
Pager
Wireless communication system
the wireless IC company
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