AP3128

Document number: DS43487 Rev. 3 - 2

8 of 12

www.diodes.com

September 2021

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AP3128

Operation Description (continued)

UVLO

A UVLO comparator is included in the AP3128 to detect the voltage on the VCC pin. It ensures that the AP3128 can draw adequate energy from

hold-up capacitor during power-on. The turn-on threshold is 15.8V and the turn-off threshold is 6.5V.

Current Sense Comparator and PWM Latch

The AP3128 operates as a current mode controller, the output switch conduction is initiated by every oscillator cycle and is terminated when the

peak inductor current reaches the threshold level established by the FB pin. The inductor current signal is converted to a voltage signal by inserting

a reference sense resistor RS. The inductor current under normal operating conditions is controlled by the voltage at FB pin. The relation between

peak inductor current (IPK) and VFB is:

)

6

/

(

S

FB

PK

R

V

I



Moreover, FOCP with 1.2V threshold is only about tDELAY-FOCP delay, which can avoid some catastrophic damages such as secondary rectifier

short test. Few drive cycles can alleviate the destruction range and get better protection.

Leading-Edge Blanking

A narrow spike on the leading edge of the current waveform can usually be observed when the power MOSFET is turned on. A tLEB time leading-

edge blank is built-in to prevent the false-triggering caused by the turn-on spike. During this period, the current limit comparator is disabled and

the gate driver cannot be switched off.

At the time of turning off the MOSFET, a negative undershoot (maybe larger than -0.3V) can occur on the SENSE pin. So it is strongly

recommended to add a small RC filter or at least

connect a resistor “R” on this pin to protect the IC (shown as Figure 4).

FB

SENSE

GATE

GND

DEM

5

4

2

6

AP3128

VCC

3

1

Large undershoot (more than

-0.3V) may damage the SENSE pin

R

C

Necessary

HV

8

Figure 4

Built-in Slope Compensation

It is well known that a continuous current mode SMPS may become unstable when the duty cycle exceeds 50%. The built-in slope compensation

can improve the stability, so there is no need for design engineer to spend much time on that.

FB Pin and Short Circuit Protection

This pin is normally connected to the opto-coupler and always paralleled with a capacitor for loop compensation. When the voltage at this pin is

greater than VFB-OLP and lasts for about tDELAY-OLP, the IC will enter the protection mode. For the AP3128, the system will enter hiccup mode to

wait the VCC decreasing to low UVLO level, then the IC will try to restart until the failure removed. And when this voltage is less than 1.2V, the IC

will stop the drive pulse immediately. Therefore, this feature can be used for short circuit protection, which makes the system immune from damage.

Normally, output short makes the VFB value to the maximum because the opto-coupler is cut off.