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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32W108HB датащи(PDF) 51 Page - STMicroelectronics |
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STM32W108HB датащи(HTML) 51 Page - STMicroelectronics |
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51 / 278 page  STM32W108HB STM32W108CC STM32W108CB STM32W108CZ System modules Doc ID 16252 Rev 14 51/278 6.3.5 Clock switching The STM32W108 has two switching mechanisms for the main system clock, providing four clock modes. The register bit SW1 in the CLK_HSECR2 register switches between the high-frequency RC oscillator (HSI) and the high-frequency crystal oscillator (HSE OSC) as the main system clock (SCLK). The peripheral clock (PCLK) is always half the frequency of SCLK. The register bit SW2 in the CLK_CPUCR register switches between PCLK and SCLK to produce the ARM® Cortex-M3 CPU clock (FCLK). The default and preferred mode of operation is to run the CPU at the lower PCLK frequency, 12 MHz, but the higher SCLK frequency, 24 MHz, can be selected to give higher processing performance at the expense of an increase in power consumption. In addition to these modes, further automatic control is invoked by hardware when Flash programming is enabled. To ensure accuracy of the Flash controller's timers, the FCLK frequency is forced to 12 MHz during Flash programming and erase operations. Table 8. System clock modes SW1 CLK_CPUCR SCLK PCLK fCLK Flash Program/ Erase Inactive Flash Program/ Erase Active 0 (HSI) 0 (Normal CPU) 12 MHz 6 MHz 6 MHz 12 MHz 0 (HSI) 1 (Fast CPU) 12 MHz 6 MHz 12 MHz 12 MHz 1 (HSE OSC) 0 (Normal CPU) 24 MHz 12 MHz 12 MHz 12 MHz 1 (HSE OSC) 1 (Fast CPU) 24 MHz 12 MHz 24 MHz 12 MHz |
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