High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

20

______________________________________________________________________________________

Dropout Design Example:

fsw = 300kHz

K = 1.8µs, worst-case K = 2.97µs

h = 1.5

Calculating again with h = 1 gives the absolute limit of

dropout:

V

VV

s

s

VV

V

IN MIN

()

..

.

.

.

.

.

=

+

()

µ×

µ













+=

25

01

1

05

1

297

01

01

313

-

-

V

VV

s

s

VV

V

IN MIN

()

..

.

.

.

..

.

=

+

()

µ×

µ













+=

25

01

1

05

15

297

01

01

348

-

-

AGND PLANE

PGND

PLANE

VIA TO IC OUT

POWER

GROUND

VIA TO IC

CS PIN

BYPASS

REF

BYPASS

BYPASS

USE AGND PLANE TO:

- TERMINATE EXTERNAL FB, ILIM,

OVP, UVP DIVIDERS

- PIN-STRAP CONTROL INPUTS

USE PGND PLANE TO:

- CONNECT IC GND PIN

TO TOP-SIDE POWER GROUND

VIA TO POWER

GROUND

TOP SIDE

BOTTOM SIDE

L1

C1

C2

D1

Q1

Q2

Q

VIA TO PGND PLANE

AND IC GND PIN

Figure 9. Power-Stage PC Board Layout Example

Table 5. Approximate K-Factor Errors

TON

SETTING

(kHz)

APPROXIMATE

K-FACTOR

ERROR (%)

(V)

200

±10

2.6

300

±10

2.9

450

±12.5

3.2

600

±12.5

3.6

K

FACTOR

(µs)

5

3.3

2.2

1.7