STM32L062K8_V01 datasheet(77/124 Pages) STMICROELECTRONICS

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DS10183 Rev 11

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STM32L062x8

Electrical characteristics

101

6.3.13

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 51 are derived from tests

performed under the conditions summarized in Table 21. All I/Os are CMOS and TTL

compliant.

Note:

For information on GPIO configuration, refer to application note AN4899 “STM32 GPIO

configuration for hardware settings and low-power consumption” available from the ST

website www.st.com.

Table 51. I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage

TC, FT, FTf, RST

I/Os

0.3VDD

BOOT0 pin

0.14VDD(1)

VIH

Input high level voltage

All I/Os

0.7 VDD

Vhys

I/O Schmitt trigger voltage hysteresis

(2)

Standard I/Os

10% VDD(3)

BOOT0 pin

0.01

Ilkg

Input leakage current (4)

VSS ≤ VIN ≤ VDD

All I/Os except for

PA11, PA12, BOOT0

and FTf I/Os

±50

VSS ≤ VIN ≤ VDD,

PA11 and PA12 I/Os

-50/+250

VSS ≤ VIN ≤ VDD

FTf I/Os

±100

VDD≤ VIN ≤ 5 V

All I/Os except for

PA11, PA12, BOOT0

and FTf I/Os

200

VDD≤ VIN ≤ 5 V

FTf I/Os

500

VDD≤ VIN ≤ 5 V

PA11, PA12 and

BOOT0

µA

RPU

Weak pull-up equivalent resistor(5)

VIN = VSS

RPD

Weak pull-down equivalent resistor(5)

VIN = VDD

CIO

I/O pin capacitance

1. Guaranteed by characterization.

2. Hysteresis voltage between Schmitt trigger switching levels. Guaranteed by characterization results.

3. With a minimum of 200 mV. Guaranteed by characterization results.

4. The max. value may be exceeded if negative current is injected on adjacent pins.

5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

MOS/NMOS contribution to the series resistance is minimum (~10% order).

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