ST25R3916 datasheet(140/157 Pages) STMICROELECTRONICS

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Electrical characteristics

ST25R3916/7

140/157

DS12484 Rev 4

11. fSUB = 848 kHz, AM channel with peak detector input stage selected.

12. Specified by design, not tested in production.

13. Manual regulator mode, VDD = 3.6 V, regulated voltage set to 3.0 V, measured on pin VDD_RF: register 00h set to 0Fh,

regulator), other registers in default state.

Table 122. ST25R3916/7 electrical characteristics (VDD = 5.5 V) (1) (2)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

IPD

Supply current in

Power-down mode

TJun = -40 to 25 °C (3)

-1

µA

TJun = 125 °C (3)

TJun = 85 °C

2.5

INFCT

Supply current in

initial NFC target mode

TJun = -40 to 25 °C (4)

-3.4

TJun = 125 °C (4)

-35

TJun = 85 °C

IWU

Supply current in Wake-up mode

(logic and RC oscillator)

TJun = -40 to 25 °C (5)

-3

TJun = 125 °C (5)

-15

TJun = 85 °C

ICS

Capacitive sensor supply current

(6)

-1.1

2.0

IRD

Supply current in Ready mode

(7)

-5.6

7.5

IAL

Supply current all active

(8)

15.0

23.0

IAL-AM

Supply current all active, AM

(9)

16.0

26.0

IAL1

Supply current all active

single RX channel

(10)

11.0

16.0

RRFO

RFO1 and RFO2 driver

output resistance

IRFO = 10 mA (11)

-1.7

Ω

RRFI

RFI input resistance

(11)(12)

-12

kΩ

VPOR

Power on reset voltage

1.00

1.45

2.00

VAGDC

AGDC voltage

(8)

1.40

1.50

1.60

VREG

Regulated voltage

(8) (11)

4.3

4.6

5.0

1. Minimum and maximum values tested in production at 25 °C, other temperature values evaluated by characterization.

2. 5.0 V supply mode with VDD = 5.5 V unless specified otherwise. Regulated voltages set to 5.1 V, 27.12 MHz Xtal connected

to XTO and XTI.

3. Registers 00h to 07h (no clock on MCU_CLK), 01h to 00h (5 V supply mode), other registers in default state.

4. Registers 00h to 07h (no clock on MCU_CLK), 01h to 00h (5 V supply mode), 02h to 03h (external field detector enable),

03h to E8h (enable NFC Target mode), other registers in default state.

5. Registers 00h to 07h (no clock on MCU_CLK), 01h to 00h (5 V supply mode), 02h to 04h (enable Wake-up mode), 32h to

08h (100 ms timeout, IRQ at every timeout), other registers in default state.

6. Registers 00h to 07h (no clock on MCU_CLK), 01h to 00h (5 V supply mode), Test register 02h to 0Eh (tdana<3:0>=0Eh;

CS analog test mode 14), other registers in default state.

7. Registers 00h to 07h (no clock on MCU_CLK), 01h to 40h (5 V supply mode, disable VDD_D), 02h to 80h (en = 1), 2Ch to

F8h (5.1 V regulator), other registers in default state, short VDD_A and VDD_D.

8. Registers 00h to 07h (no clock on MCU_CLK), 01h to 40h (5 V supply mode, disable VDD_D), 02h to C8h (enable RX,

enable TX), 28h to 7Fh (RFO segments disabled), 2Ch to F8h (5.1 V regulator), other registers in default state, short

VDD_A and VDD_D.

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