MMDF1N05E, MVDF1N05E

http://onsemi.com

4

0

VGS

VDS

Ciss

Coss

16

10

6

0

12

10

8

6

4

2

0

Qg, TOTAL GATE CHARGE (nC)

Figure 7. Capacitance Variation

24

8

12

14

Figure 8. Gate Charge versus

Gate−To−Source Voltage

1200

1000

800

600

400

0

20

10

0

20

GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)

200

15

5

5

10

15

VDS = 25 V

ID = 1.2 A

VDS = 0

Ciss

Crss

Crss

VGS = 0

TJ = 25°C

25

SAFE OPERATING AREA INFORMATION

Forward Biased Safe Operating Area

The FBSOA curves define the maximum drain−to−source

voltage and drain current that a device can safely handle

when it is forward biased, or when it is on, or being turned

on. Because these curves include the limitations of

simultaneous high voltage and high current, up to the rating

of the device, they are especially useful to designers of linear

systems. The curves are based on a case temperature of 25

°C

and a maximum junction temperature of 150

°C. Limitations

for repetitive pulses at various case temperatures can be

determined by using the thermal response curves. ON

Semiconductor Application Note, AN569, “Transient

Thermal Resistance − General Data and Its Use” provides

detailed instructions.

Figure 9. Maximum Rated Forward Biased

Safe Operating Area

0.1

VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

1

10

RDS(on) LIMIT

THERMAL LIMIT

PACKAGE LIMIT

0.01

VGS = 20 V

SINGLE PULSE

TC = 25°C

10

0.1

dc

10 ms

1

100

100

Mounted on 2

″ sq. FR4 board (1″ sq. 2 oz. Cu 0.06″

thick single sided) with one die operating, 10s max.

100

ms

10

ms

Figure 10. Thermal Response

t, TIME (s)

1

0.1

0.01

D = 0.5

SINGLE PULSE

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

1.0E+00

1.0E+01

0.2

0.1

0.05

0.02

0.01

1.0E+02

1.0E+03

0.001

10

0.0175

W

0.0710

W

0.2706

W

0.5776

W

0.7086

W

107.55 F

1.7891 F

0.3074 F

0.0854 F

0.0154 F

Chip

Ambient

Normalized to

qja at 10s.