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ICS951402 датащи(PDF) 11 Page - Integrated Circuit Systems |
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ICS951402 датащи(HTML) 11 Page - Integrated Circuit Systems |
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11 / 23 page ![]() 11 Integrated Circuit Systems, Inc. ICS951402 Advance Information 0660—05/05/05 I 2C Table: Output Divider Control Register Byte 15 Pin # Name Control Function Type 0 1 PWD Bit 7 - SD Div3 RW X Bit 6 - SD Div2 RW X Bit 5 - SD Div1 RW X Bit 4 - SD Div0 SDRAM divider ratio can be configured via these 4 bits individually. RW See Table 2: Divider Ratio Combination Table X Bit 3 - CPU Div3 RW X Bit 2 - CPU Div2 RW X Bit 1 - CPU Div1 RW X Bit 0 - CPU Div0 CPU divider ratio can be configured via these 4 bits individually. RW See Table 2: Divider Ratio Combination Table X Table 2: CPU, SDRAM, AGP and PCI66 Divider Ratio Combination Table Divider (3:2) Bit 00 01 10 11 MSB 1 2 4 8 00 0000 2 0100 4 1000 8 1100 16 01 0001 3 0101 6 1001 12 1101 24 10 0010 5 0110 10 1010 20 1110 40 11 0011 7 0111 14 1011 28 1111 56 LSB Address Div Address Div Address Div Address Div Table 3: PCI33 Divider Ratio Combination Table Divider (3:2) Bit 00 01 10 11 MSB 1 2 4 8 00 0000 4 0100 8 1000 16 1100 32 01 0001 3 0101 6 1001 12 1101 24 10 0010 5 0110 10 1010 20 1110 40 11 0011 7 0111 14 1011 28 1111 56 LSB Address Div Address Div Address Div Address Div |
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